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4d4c4e24cf
The IRQ_EXIT_OFFSET trick was used to make sure the irq doesn't get preempted after we substract the HARDIRQ_OFFSET until we are entirely done with any code in irq_exit(). This workaround was necessary because some archs may call irq_exit() with irqs enabled and there is still some code in the end of this function that is not covered by the HARDIRQ_OFFSET but want to stay non-preemptible. Now that irq are always disabled in irq_exit(), the whole code is guaranteed not to be preempted. We can thus remove this hack. Signed-off-by: Frederic Weisbecker <fweisbec@gmail.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
200 lines
5.4 KiB
C
200 lines
5.4 KiB
C
#ifndef LINUX_HARDIRQ_H
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#define LINUX_HARDIRQ_H
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#include <linux/preempt.h>
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#include <linux/lockdep.h>
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#include <linux/ftrace_irq.h>
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#include <linux/vtime.h>
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#include <asm/hardirq.h>
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/*
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* We put the hardirq and softirq counter into the preemption
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* counter. The bitmask has the following meaning:
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*
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* - bits 0-7 are the preemption count (max preemption depth: 256)
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* - bits 8-15 are the softirq count (max # of softirqs: 256)
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*
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* The hardirq count can in theory reach the same as NR_IRQS.
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* In reality, the number of nested IRQS is limited to the stack
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* size as well. For archs with over 1000 IRQS it is not practical
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* to expect that they will all nest. We give a max of 10 bits for
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* hardirq nesting. An arch may choose to give less than 10 bits.
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* m68k expects it to be 8.
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*
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* - bits 16-25 are the hardirq count (max # of nested hardirqs: 1024)
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* - bit 26 is the NMI_MASK
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* - bit 27 is the PREEMPT_ACTIVE flag
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*
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* PREEMPT_MASK: 0x000000ff
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* SOFTIRQ_MASK: 0x0000ff00
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* HARDIRQ_MASK: 0x03ff0000
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* NMI_MASK: 0x04000000
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*/
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#define PREEMPT_BITS 8
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#define SOFTIRQ_BITS 8
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#define NMI_BITS 1
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#define MAX_HARDIRQ_BITS 10
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#ifndef HARDIRQ_BITS
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# define HARDIRQ_BITS MAX_HARDIRQ_BITS
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#endif
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#if HARDIRQ_BITS > MAX_HARDIRQ_BITS
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#error HARDIRQ_BITS too high!
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#endif
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#define PREEMPT_SHIFT 0
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#define SOFTIRQ_SHIFT (PREEMPT_SHIFT + PREEMPT_BITS)
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#define HARDIRQ_SHIFT (SOFTIRQ_SHIFT + SOFTIRQ_BITS)
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#define NMI_SHIFT (HARDIRQ_SHIFT + HARDIRQ_BITS)
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#define __IRQ_MASK(x) ((1UL << (x))-1)
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#define PREEMPT_MASK (__IRQ_MASK(PREEMPT_BITS) << PREEMPT_SHIFT)
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#define SOFTIRQ_MASK (__IRQ_MASK(SOFTIRQ_BITS) << SOFTIRQ_SHIFT)
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#define HARDIRQ_MASK (__IRQ_MASK(HARDIRQ_BITS) << HARDIRQ_SHIFT)
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#define NMI_MASK (__IRQ_MASK(NMI_BITS) << NMI_SHIFT)
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#define PREEMPT_OFFSET (1UL << PREEMPT_SHIFT)
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#define SOFTIRQ_OFFSET (1UL << SOFTIRQ_SHIFT)
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#define HARDIRQ_OFFSET (1UL << HARDIRQ_SHIFT)
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#define NMI_OFFSET (1UL << NMI_SHIFT)
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#define SOFTIRQ_DISABLE_OFFSET (2 * SOFTIRQ_OFFSET)
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#ifndef PREEMPT_ACTIVE
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#define PREEMPT_ACTIVE_BITS 1
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#define PREEMPT_ACTIVE_SHIFT (NMI_SHIFT + NMI_BITS)
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#define PREEMPT_ACTIVE (__IRQ_MASK(PREEMPT_ACTIVE_BITS) << PREEMPT_ACTIVE_SHIFT)
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#endif
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#if PREEMPT_ACTIVE < (1 << (NMI_SHIFT + NMI_BITS))
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#error PREEMPT_ACTIVE is too low!
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#endif
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#define hardirq_count() (preempt_count() & HARDIRQ_MASK)
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#define softirq_count() (preempt_count() & SOFTIRQ_MASK)
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#define irq_count() (preempt_count() & (HARDIRQ_MASK | SOFTIRQ_MASK \
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| NMI_MASK))
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/*
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* Are we doing bottom half or hardware interrupt processing?
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* Are we in a softirq context? Interrupt context?
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* in_softirq - Are we currently processing softirq or have bh disabled?
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* in_serving_softirq - Are we currently processing softirq?
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*/
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#define in_irq() (hardirq_count())
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#define in_softirq() (softirq_count())
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#define in_interrupt() (irq_count())
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#define in_serving_softirq() (softirq_count() & SOFTIRQ_OFFSET)
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/*
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* Are we in NMI context?
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*/
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#define in_nmi() (preempt_count() & NMI_MASK)
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#if defined(CONFIG_PREEMPT_COUNT)
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# define PREEMPT_CHECK_OFFSET 1
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#else
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# define PREEMPT_CHECK_OFFSET 0
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#endif
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/*
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* Are we running in atomic context? WARNING: this macro cannot
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* always detect atomic context; in particular, it cannot know about
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* held spinlocks in non-preemptible kernels. Thus it should not be
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* used in the general case to determine whether sleeping is possible.
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* Do not use in_atomic() in driver code.
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*/
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#define in_atomic() ((preempt_count() & ~PREEMPT_ACTIVE) != 0)
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/*
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* Check whether we were atomic before we did preempt_disable():
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* (used by the scheduler, *after* releasing the kernel lock)
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*/
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#define in_atomic_preempt_off() \
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((preempt_count() & ~PREEMPT_ACTIVE) != PREEMPT_CHECK_OFFSET)
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#ifdef CONFIG_PREEMPT_COUNT
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# define preemptible() (preempt_count() == 0 && !irqs_disabled())
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#else
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# define preemptible() 0
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#endif
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#if defined(CONFIG_SMP) || defined(CONFIG_GENERIC_HARDIRQS)
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extern void synchronize_irq(unsigned int irq);
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#else
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# define synchronize_irq(irq) barrier()
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#endif
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#if defined(CONFIG_TINY_RCU) || defined(CONFIG_TINY_PREEMPT_RCU)
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static inline void rcu_nmi_enter(void)
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{
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}
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static inline void rcu_nmi_exit(void)
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{
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}
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#else
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extern void rcu_nmi_enter(void);
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extern void rcu_nmi_exit(void);
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#endif
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/*
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* It is safe to do non-atomic ops on ->hardirq_context,
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* because NMI handlers may not preempt and the ops are
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* always balanced, so the interrupted value of ->hardirq_context
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* will always be restored.
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*/
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#define __irq_enter() \
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do { \
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account_irq_enter_time(current); \
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add_preempt_count(HARDIRQ_OFFSET); \
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trace_hardirq_enter(); \
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} while (0)
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/*
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* Enter irq context (on NO_HZ, update jiffies):
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*/
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extern void irq_enter(void);
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/*
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* Exit irq context without processing softirqs:
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*/
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#define __irq_exit() \
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do { \
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trace_hardirq_exit(); \
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account_irq_exit_time(current); \
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sub_preempt_count(HARDIRQ_OFFSET); \
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} while (0)
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/*
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* Exit irq context and process softirqs if needed:
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*/
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extern void irq_exit(void);
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#define nmi_enter() \
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do { \
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lockdep_off(); \
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ftrace_nmi_enter(); \
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BUG_ON(in_nmi()); \
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add_preempt_count(NMI_OFFSET + HARDIRQ_OFFSET); \
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rcu_nmi_enter(); \
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trace_hardirq_enter(); \
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} while (0)
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#define nmi_exit() \
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do { \
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trace_hardirq_exit(); \
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rcu_nmi_exit(); \
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BUG_ON(!in_nmi()); \
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sub_preempt_count(NMI_OFFSET + HARDIRQ_OFFSET); \
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ftrace_nmi_exit(); \
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lockdep_on(); \
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} while (0)
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#endif /* LINUX_HARDIRQ_H */
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