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70c8f01a35
On non-DT platforms IRQ controllers associated with the GPIOs have a fixed IRQ base value known at compile time. The sh-pfc driver translates GPIO number to IRQ numbers using a hardcoded table. This mechanism breaks on DT platforms, as the IRQ base values are dynamic in that case. Fix this by specifying IRQs associated with GPIOs in IRQ resources, populated automatically from the device tree. When IRQ resources are specified the driver requires one IRQ resource per GPIO able to generate an interrupt, and uses the translation table to compute the IRQ resource offset instead of the IRQ number. Cc: devicetree@vger.kernel.org Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
91 lines
2.6 KiB
C
91 lines
2.6 KiB
C
/*
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* SuperH Pin Function Controller support.
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*
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* Copyright (C) 2012 Renesas Solutions Corp.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#ifndef __SH_PFC_CORE_H__
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#define __SH_PFC_CORE_H__
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#include <linux/compiler.h>
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#include <linux/spinlock.h>
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#include <linux/types.h>
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#include "sh_pfc.h"
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struct sh_pfc_window {
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phys_addr_t phys;
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void __iomem *virt;
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unsigned long size;
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};
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struct sh_pfc_chip;
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struct sh_pfc_pinctrl;
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struct sh_pfc_pin_range {
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u16 start;
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u16 end;
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};
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struct sh_pfc {
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struct device *dev;
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const struct sh_pfc_soc_info *info;
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void *soc_data;
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spinlock_t lock;
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unsigned int num_windows;
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struct sh_pfc_window *windows;
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unsigned int num_irqs;
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unsigned int *irqs;
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struct sh_pfc_pin_range *ranges;
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unsigned int nr_ranges;
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unsigned int nr_gpio_pins;
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struct sh_pfc_chip *gpio;
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struct sh_pfc_chip *func;
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struct sh_pfc_pinctrl *pinctrl;
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};
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int sh_pfc_register_gpiochip(struct sh_pfc *pfc);
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int sh_pfc_unregister_gpiochip(struct sh_pfc *pfc);
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int sh_pfc_register_pinctrl(struct sh_pfc *pfc);
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int sh_pfc_unregister_pinctrl(struct sh_pfc *pfc);
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unsigned long sh_pfc_read_raw_reg(void __iomem *mapped_reg,
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unsigned long reg_width);
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void sh_pfc_write_raw_reg(void __iomem *mapped_reg, unsigned long reg_width,
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unsigned long data);
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int sh_pfc_get_pin_index(struct sh_pfc *pfc, unsigned int pin);
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int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type);
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extern const struct sh_pfc_soc_info r8a73a4_pinmux_info;
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extern const struct sh_pfc_soc_info r8a7740_pinmux_info;
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extern const struct sh_pfc_soc_info r8a7778_pinmux_info;
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extern const struct sh_pfc_soc_info r8a7779_pinmux_info;
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extern const struct sh_pfc_soc_info r8a7790_pinmux_info;
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extern const struct sh_pfc_soc_info r8a7791_pinmux_info;
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extern const struct sh_pfc_soc_info sh7203_pinmux_info;
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extern const struct sh_pfc_soc_info sh7264_pinmux_info;
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extern const struct sh_pfc_soc_info sh7269_pinmux_info;
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extern const struct sh_pfc_soc_info sh7372_pinmux_info;
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extern const struct sh_pfc_soc_info sh73a0_pinmux_info;
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extern const struct sh_pfc_soc_info sh7720_pinmux_info;
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extern const struct sh_pfc_soc_info sh7722_pinmux_info;
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extern const struct sh_pfc_soc_info sh7723_pinmux_info;
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extern const struct sh_pfc_soc_info sh7724_pinmux_info;
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extern const struct sh_pfc_soc_info sh7734_pinmux_info;
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extern const struct sh_pfc_soc_info sh7757_pinmux_info;
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extern const struct sh_pfc_soc_info sh7785_pinmux_info;
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extern const struct sh_pfc_soc_info sh7786_pinmux_info;
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extern const struct sh_pfc_soc_info shx3_pinmux_info;
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#endif /* __SH_PFC_CORE_H__ */
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