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bdc04e3174
This is used by various drivers not just serial and can be extracted as commonality Signed-off-by: Alan Cox <alan@linux.intel.com>
705 lines
16 KiB
C
705 lines
16 KiB
C
/*
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* drivers/serial/serial_ks8695.c
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*
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* Driver for KS8695 serial ports
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*
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* Based on drivers/serial/serial_amba.c, by Kam Lee.
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*
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* Copyright 2002-2005 Micrel Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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*/
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#include <linux/module.h>
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#include <linux/tty.h>
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#include <linux/ioport.h>
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#include <linux/init.h>
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#include <linux/serial.h>
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#include <linux/console.h>
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#include <linux/sysrq.h>
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#include <linux/device.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/mach/irq.h>
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#include <mach/regs-uart.h>
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#include <mach/regs-irq.h>
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#if defined(CONFIG_SERIAL_KS8695_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
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#define SUPPORT_SYSRQ
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#endif
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#include <linux/serial_core.h>
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#define SERIAL_KS8695_MAJOR 204
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#define SERIAL_KS8695_MINOR 16
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#define SERIAL_KS8695_DEVNAME "ttyAM"
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#define SERIAL_KS8695_NR 1
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/*
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* Access macros for the KS8695 UART
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*/
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#define UART_GET_CHAR(p) (__raw_readl((p)->membase + KS8695_URRB) & 0xFF)
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#define UART_PUT_CHAR(p, c) __raw_writel((c), (p)->membase + KS8695_URTH)
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#define UART_GET_FCR(p) __raw_readl((p)->membase + KS8695_URFC)
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#define UART_PUT_FCR(p, c) __raw_writel((c), (p)->membase + KS8695_URFC)
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#define UART_GET_MSR(p) __raw_readl((p)->membase + KS8695_URMS)
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#define UART_GET_LSR(p) __raw_readl((p)->membase + KS8695_URLS)
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#define UART_GET_LCR(p) __raw_readl((p)->membase + KS8695_URLC)
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#define UART_PUT_LCR(p, c) __raw_writel((c), (p)->membase + KS8695_URLC)
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#define UART_GET_MCR(p) __raw_readl((p)->membase + KS8695_URMC)
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#define UART_PUT_MCR(p, c) __raw_writel((c), (p)->membase + KS8695_URMC)
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#define UART_GET_BRDR(p) __raw_readl((p)->membase + KS8695_URBD)
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#define UART_PUT_BRDR(p, c) __raw_writel((c), (p)->membase + KS8695_URBD)
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#define KS8695_CLR_TX_INT() __raw_writel(1 << KS8695_IRQ_UART_TX, KS8695_IRQ_VA + KS8695_INTST)
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#define UART_DUMMY_LSR_RX 0x100
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#define UART_PORT_SIZE (KS8695_USR - KS8695_URRB + 4)
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static inline int tx_enabled(struct uart_port *port)
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{
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return port->unused[0] & 1;
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}
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static inline int rx_enabled(struct uart_port *port)
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{
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return port->unused[0] & 2;
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}
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static inline int ms_enabled(struct uart_port *port)
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{
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return port->unused[0] & 4;
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}
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static inline void ms_enable(struct uart_port *port, int enabled)
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{
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if(enabled)
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port->unused[0] |= 4;
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else
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port->unused[0] &= ~4;
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}
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static inline void rx_enable(struct uart_port *port, int enabled)
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{
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if(enabled)
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port->unused[0] |= 2;
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else
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port->unused[0] &= ~2;
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}
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static inline void tx_enable(struct uart_port *port, int enabled)
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{
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if(enabled)
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port->unused[0] |= 1;
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else
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port->unused[0] &= ~1;
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}
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#ifdef SUPPORT_SYSRQ
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static struct console ks8695_console;
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#endif
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static void ks8695uart_stop_tx(struct uart_port *port)
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{
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if (tx_enabled(port)) {
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/* use disable_irq_nosync() and not disable_irq() to avoid self
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* imposed deadlock by not waiting for irq handler to end,
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* since this ks8695uart_stop_tx() is called from interrupt context.
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*/
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disable_irq_nosync(KS8695_IRQ_UART_TX);
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tx_enable(port, 0);
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}
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}
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static void ks8695uart_start_tx(struct uart_port *port)
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{
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if (!tx_enabled(port)) {
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enable_irq(KS8695_IRQ_UART_TX);
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tx_enable(port, 1);
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}
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}
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static void ks8695uart_stop_rx(struct uart_port *port)
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{
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if (rx_enabled(port)) {
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disable_irq(KS8695_IRQ_UART_RX);
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rx_enable(port, 0);
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}
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}
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static void ks8695uart_enable_ms(struct uart_port *port)
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{
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if (!ms_enabled(port)) {
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enable_irq(KS8695_IRQ_UART_MODEM_STATUS);
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ms_enable(port,1);
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}
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}
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static void ks8695uart_disable_ms(struct uart_port *port)
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{
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if (ms_enabled(port)) {
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disable_irq(KS8695_IRQ_UART_MODEM_STATUS);
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ms_enable(port,0);
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}
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}
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static irqreturn_t ks8695uart_rx_chars(int irq, void *dev_id)
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{
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struct uart_port *port = dev_id;
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struct tty_struct *tty = port->state->port.tty;
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unsigned int status, ch, lsr, flg, max_count = 256;
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status = UART_GET_LSR(port); /* clears pending LSR interrupts */
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while ((status & URLS_URDR) && max_count--) {
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ch = UART_GET_CHAR(port);
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flg = TTY_NORMAL;
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port->icount.rx++;
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/*
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* Note that the error handling code is
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* out of the main execution path
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*/
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lsr = UART_GET_LSR(port) | UART_DUMMY_LSR_RX;
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if (unlikely(lsr & (URLS_URBI | URLS_URPE | URLS_URFE | URLS_URROE))) {
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if (lsr & URLS_URBI) {
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lsr &= ~(URLS_URFE | URLS_URPE);
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port->icount.brk++;
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if (uart_handle_break(port))
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goto ignore_char;
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}
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if (lsr & URLS_URPE)
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port->icount.parity++;
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if (lsr & URLS_URFE)
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port->icount.frame++;
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if (lsr & URLS_URROE)
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port->icount.overrun++;
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lsr &= port->read_status_mask;
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if (lsr & URLS_URBI)
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flg = TTY_BREAK;
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else if (lsr & URLS_URPE)
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flg = TTY_PARITY;
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else if (lsr & URLS_URFE)
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flg = TTY_FRAME;
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}
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if (uart_handle_sysrq_char(port, ch))
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goto ignore_char;
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uart_insert_char(port, lsr, URLS_URROE, ch, flg);
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ignore_char:
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status = UART_GET_LSR(port);
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}
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tty_flip_buffer_push(tty);
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return IRQ_HANDLED;
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}
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static irqreturn_t ks8695uart_tx_chars(int irq, void *dev_id)
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{
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struct uart_port *port = dev_id;
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struct circ_buf *xmit = &port->state->xmit;
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unsigned int count;
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if (port->x_char) {
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KS8695_CLR_TX_INT();
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UART_PUT_CHAR(port, port->x_char);
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port->icount.tx++;
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port->x_char = 0;
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return IRQ_HANDLED;
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}
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if (uart_tx_stopped(port) || uart_circ_empty(xmit)) {
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ks8695uart_stop_tx(port);
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return IRQ_HANDLED;
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}
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count = 16; /* fifo size */
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while (!uart_circ_empty(xmit) && (count-- > 0)) {
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KS8695_CLR_TX_INT();
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UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
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port->icount.tx++;
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}
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if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
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uart_write_wakeup(port);
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if (uart_circ_empty(xmit))
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ks8695uart_stop_tx(port);
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return IRQ_HANDLED;
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}
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static irqreturn_t ks8695uart_modem_status(int irq, void *dev_id)
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{
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struct uart_port *port = dev_id;
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unsigned int status;
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/*
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* clear modem interrupt by reading MSR
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*/
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status = UART_GET_MSR(port);
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if (status & URMS_URDDCD)
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uart_handle_dcd_change(port, status & URMS_URDDCD);
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if (status & URMS_URDDST)
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port->icount.dsr++;
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if (status & URMS_URDCTS)
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uart_handle_cts_change(port, status & URMS_URDCTS);
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if (status & URMS_URTERI)
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port->icount.rng++;
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wake_up_interruptible(&port->state->port.delta_msr_wait);
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return IRQ_HANDLED;
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}
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static unsigned int ks8695uart_tx_empty(struct uart_port *port)
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{
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return (UART_GET_LSR(port) & URLS_URTE) ? TIOCSER_TEMT : 0;
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}
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static unsigned int ks8695uart_get_mctrl(struct uart_port *port)
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{
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unsigned int result = 0;
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unsigned int status;
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status = UART_GET_MSR(port);
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if (status & URMS_URDCD)
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result |= TIOCM_CAR;
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if (status & URMS_URDSR)
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result |= TIOCM_DSR;
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if (status & URMS_URCTS)
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result |= TIOCM_CTS;
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if (status & URMS_URRI)
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result |= TIOCM_RI;
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return result;
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}
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static void ks8695uart_set_mctrl(struct uart_port *port, u_int mctrl)
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{
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unsigned int mcr;
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mcr = UART_GET_MCR(port);
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if (mctrl & TIOCM_RTS)
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mcr |= URMC_URRTS;
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else
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mcr &= ~URMC_URRTS;
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if (mctrl & TIOCM_DTR)
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mcr |= URMC_URDTR;
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else
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mcr &= ~URMC_URDTR;
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UART_PUT_MCR(port, mcr);
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}
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static void ks8695uart_break_ctl(struct uart_port *port, int break_state)
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{
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unsigned int lcr;
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lcr = UART_GET_LCR(port);
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if (break_state == -1)
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lcr |= URLC_URSBC;
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else
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lcr &= ~URLC_URSBC;
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UART_PUT_LCR(port, lcr);
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}
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static int ks8695uart_startup(struct uart_port *port)
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{
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int retval;
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set_irq_flags(KS8695_IRQ_UART_TX, IRQF_VALID | IRQF_NOAUTOEN);
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tx_enable(port, 0);
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rx_enable(port, 1);
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ms_enable(port, 1);
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/*
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* Allocate the IRQ
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*/
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retval = request_irq(KS8695_IRQ_UART_TX, ks8695uart_tx_chars, IRQF_DISABLED, "UART TX", port);
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if (retval)
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goto err_tx;
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retval = request_irq(KS8695_IRQ_UART_RX, ks8695uart_rx_chars, IRQF_DISABLED, "UART RX", port);
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if (retval)
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goto err_rx;
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retval = request_irq(KS8695_IRQ_UART_LINE_STATUS, ks8695uart_rx_chars, IRQF_DISABLED, "UART LineStatus", port);
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if (retval)
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goto err_ls;
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retval = request_irq(KS8695_IRQ_UART_MODEM_STATUS, ks8695uart_modem_status, IRQF_DISABLED, "UART ModemStatus", port);
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if (retval)
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goto err_ms;
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return 0;
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err_ms:
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free_irq(KS8695_IRQ_UART_LINE_STATUS, port);
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err_ls:
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free_irq(KS8695_IRQ_UART_RX, port);
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err_rx:
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free_irq(KS8695_IRQ_UART_TX, port);
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err_tx:
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return retval;
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}
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static void ks8695uart_shutdown(struct uart_port *port)
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{
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/*
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* Free the interrupt
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*/
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free_irq(KS8695_IRQ_UART_RX, port);
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free_irq(KS8695_IRQ_UART_TX, port);
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free_irq(KS8695_IRQ_UART_MODEM_STATUS, port);
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free_irq(KS8695_IRQ_UART_LINE_STATUS, port);
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/* disable break condition and fifos */
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UART_PUT_LCR(port, UART_GET_LCR(port) & ~URLC_URSBC);
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UART_PUT_FCR(port, UART_GET_FCR(port) & ~URFC_URFE);
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}
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static void ks8695uart_set_termios(struct uart_port *port, struct ktermios *termios, struct ktermios *old)
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{
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unsigned int lcr, fcr = 0;
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unsigned long flags;
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unsigned int baud, quot;
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/*
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* Ask the core to calculate the divisor for us.
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*/
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baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
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quot = uart_get_divisor(port, baud);
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switch (termios->c_cflag & CSIZE) {
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case CS5:
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lcr = URCL_5;
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break;
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case CS6:
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lcr = URCL_6;
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break;
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case CS7:
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lcr = URCL_7;
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break;
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default:
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lcr = URCL_8;
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break;
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}
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/* stop bits */
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if (termios->c_cflag & CSTOPB)
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lcr |= URLC_URSB;
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/* parity */
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if (termios->c_cflag & PARENB) {
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if (termios->c_cflag & CMSPAR) { /* Mark or Space parity */
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if (termios->c_cflag & PARODD)
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lcr |= URPE_MARK;
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else
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lcr |= URPE_SPACE;
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}
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else if (termios->c_cflag & PARODD)
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lcr |= URPE_ODD;
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else
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lcr |= URPE_EVEN;
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}
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if (port->fifosize > 1)
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fcr = URFC_URFRT_8 | URFC_URTFR | URFC_URRFR | URFC_URFE;
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spin_lock_irqsave(&port->lock, flags);
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/*
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* Update the per-port timeout.
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*/
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uart_update_timeout(port, termios->c_cflag, baud);
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port->read_status_mask = URLS_URROE;
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if (termios->c_iflag & INPCK)
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port->read_status_mask |= (URLS_URFE | URLS_URPE);
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if (termios->c_iflag & (BRKINT | PARMRK))
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port->read_status_mask |= URLS_URBI;
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/*
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* Characters to ignore
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*/
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port->ignore_status_mask = 0;
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if (termios->c_iflag & IGNPAR)
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port->ignore_status_mask |= (URLS_URFE | URLS_URPE);
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if (termios->c_iflag & IGNBRK) {
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port->ignore_status_mask |= URLS_URBI;
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/*
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* If we're ignoring parity and break indicators,
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* ignore overruns too (for real raw support).
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*/
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if (termios->c_iflag & IGNPAR)
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port->ignore_status_mask |= URLS_URROE;
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}
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/*
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* Ignore all characters if CREAD is not set.
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*/
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if ((termios->c_cflag & CREAD) == 0)
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port->ignore_status_mask |= UART_DUMMY_LSR_RX;
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/* first, disable everything */
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if (UART_ENABLE_MS(port, termios->c_cflag))
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ks8695uart_enable_ms(port);
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else
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ks8695uart_disable_ms(port);
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/* Set baud rate */
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UART_PUT_BRDR(port, quot);
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UART_PUT_LCR(port, lcr);
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UART_PUT_FCR(port, fcr);
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spin_unlock_irqrestore(&port->lock, flags);
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}
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static const char *ks8695uart_type(struct uart_port *port)
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{
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return port->type == PORT_KS8695 ? "KS8695" : NULL;
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}
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/*
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* Release the memory region(s) being used by 'port'
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*/
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static void ks8695uart_release_port(struct uart_port *port)
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{
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release_mem_region(port->mapbase, UART_PORT_SIZE);
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}
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/*
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* Request the memory region(s) being used by 'port'
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*/
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static int ks8695uart_request_port(struct uart_port *port)
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{
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return request_mem_region(port->mapbase, UART_PORT_SIZE,
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"serial_ks8695") != NULL ? 0 : -EBUSY;
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}
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/*
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* Configure/autoconfigure the port.
|
|
*/
|
|
static void ks8695uart_config_port(struct uart_port *port, int flags)
|
|
{
|
|
if (flags & UART_CONFIG_TYPE) {
|
|
port->type = PORT_KS8695;
|
|
ks8695uart_request_port(port);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* verify the new serial_struct (for TIOCSSERIAL).
|
|
*/
|
|
static int ks8695uart_verify_port(struct uart_port *port, struct serial_struct *ser)
|
|
{
|
|
int ret = 0;
|
|
|
|
if (ser->type != PORT_UNKNOWN && ser->type != PORT_KS8695)
|
|
ret = -EINVAL;
|
|
if (ser->irq != port->irq)
|
|
ret = -EINVAL;
|
|
if (ser->baud_base < 9600)
|
|
ret = -EINVAL;
|
|
return ret;
|
|
}
|
|
|
|
static struct uart_ops ks8695uart_pops = {
|
|
.tx_empty = ks8695uart_tx_empty,
|
|
.set_mctrl = ks8695uart_set_mctrl,
|
|
.get_mctrl = ks8695uart_get_mctrl,
|
|
.stop_tx = ks8695uart_stop_tx,
|
|
.start_tx = ks8695uart_start_tx,
|
|
.stop_rx = ks8695uart_stop_rx,
|
|
.enable_ms = ks8695uart_enable_ms,
|
|
.break_ctl = ks8695uart_break_ctl,
|
|
.startup = ks8695uart_startup,
|
|
.shutdown = ks8695uart_shutdown,
|
|
.set_termios = ks8695uart_set_termios,
|
|
.type = ks8695uart_type,
|
|
.release_port = ks8695uart_release_port,
|
|
.request_port = ks8695uart_request_port,
|
|
.config_port = ks8695uart_config_port,
|
|
.verify_port = ks8695uart_verify_port,
|
|
};
|
|
|
|
static struct uart_port ks8695uart_ports[SERIAL_KS8695_NR] = {
|
|
{
|
|
.membase = (void *) KS8695_UART_VA,
|
|
.mapbase = KS8695_UART_VA,
|
|
.iotype = SERIAL_IO_MEM,
|
|
.irq = KS8695_IRQ_UART_TX,
|
|
.uartclk = KS8695_CLOCK_RATE * 16,
|
|
.fifosize = 16,
|
|
.ops = &ks8695uart_pops,
|
|
.flags = ASYNC_BOOT_AUTOCONF,
|
|
.line = 0,
|
|
}
|
|
};
|
|
|
|
#ifdef CONFIG_SERIAL_KS8695_CONSOLE
|
|
static void ks8695_console_putchar(struct uart_port *port, int ch)
|
|
{
|
|
while (!(UART_GET_LSR(port) & URLS_URTHRE))
|
|
barrier();
|
|
|
|
UART_PUT_CHAR(port, ch);
|
|
}
|
|
|
|
static void ks8695_console_write(struct console *co, const char *s, u_int count)
|
|
{
|
|
struct uart_port *port = ks8695uart_ports + co->index;
|
|
|
|
uart_console_write(port, s, count, ks8695_console_putchar);
|
|
}
|
|
|
|
static void __init ks8695_console_get_options(struct uart_port *port, int *baud, int *parity, int *bits)
|
|
{
|
|
unsigned int lcr;
|
|
|
|
lcr = UART_GET_LCR(port);
|
|
|
|
switch (lcr & URLC_PARITY) {
|
|
case URPE_ODD:
|
|
*parity = 'o';
|
|
break;
|
|
case URPE_EVEN:
|
|
*parity = 'e';
|
|
break;
|
|
default:
|
|
*parity = 'n';
|
|
}
|
|
|
|
switch (lcr & URLC_URCL) {
|
|
case URCL_5:
|
|
*bits = 5;
|
|
break;
|
|
case URCL_6:
|
|
*bits = 6;
|
|
break;
|
|
case URCL_7:
|
|
*bits = 7;
|
|
break;
|
|
default:
|
|
*bits = 8;
|
|
}
|
|
|
|
*baud = port->uartclk / (UART_GET_BRDR(port) & 0x0FFF);
|
|
*baud /= 16;
|
|
*baud &= 0xFFFFFFF0;
|
|
}
|
|
|
|
static int __init ks8695_console_setup(struct console *co, char *options)
|
|
{
|
|
struct uart_port *port;
|
|
int baud = 115200;
|
|
int bits = 8;
|
|
int parity = 'n';
|
|
int flow = 'n';
|
|
|
|
/*
|
|
* Check whether an invalid uart number has been specified, and
|
|
* if so, search for the first available port that does have
|
|
* console support.
|
|
*/
|
|
port = uart_get_console(ks8695uart_ports, SERIAL_KS8695_NR, co);
|
|
|
|
if (options)
|
|
uart_parse_options(options, &baud, &parity, &bits, &flow);
|
|
else
|
|
ks8695_console_get_options(port, &baud, &parity, &bits);
|
|
|
|
return uart_set_options(port, co, baud, parity, bits, flow);
|
|
}
|
|
|
|
static struct uart_driver ks8695_reg;
|
|
|
|
static struct console ks8695_console = {
|
|
.name = SERIAL_KS8695_DEVNAME,
|
|
.write = ks8695_console_write,
|
|
.device = uart_console_device,
|
|
.setup = ks8695_console_setup,
|
|
.flags = CON_PRINTBUFFER,
|
|
.index = -1,
|
|
.data = &ks8695_reg,
|
|
};
|
|
|
|
static int __init ks8695_console_init(void)
|
|
{
|
|
register_console(&ks8695_console);
|
|
return 0;
|
|
}
|
|
|
|
console_initcall(ks8695_console_init);
|
|
|
|
#define KS8695_CONSOLE &ks8695_console
|
|
#else
|
|
#define KS8695_CONSOLE NULL
|
|
#endif
|
|
|
|
static struct uart_driver ks8695_reg = {
|
|
.owner = THIS_MODULE,
|
|
.driver_name = "serial_ks8695",
|
|
.dev_name = SERIAL_KS8695_DEVNAME,
|
|
.major = SERIAL_KS8695_MAJOR,
|
|
.minor = SERIAL_KS8695_MINOR,
|
|
.nr = SERIAL_KS8695_NR,
|
|
.cons = KS8695_CONSOLE,
|
|
};
|
|
|
|
static int __init ks8695uart_init(void)
|
|
{
|
|
int i, ret;
|
|
|
|
printk(KERN_INFO "Serial: Micrel KS8695 UART driver\n");
|
|
|
|
ret = uart_register_driver(&ks8695_reg);
|
|
if (ret)
|
|
return ret;
|
|
|
|
for (i = 0; i < SERIAL_KS8695_NR; i++)
|
|
uart_add_one_port(&ks8695_reg, &ks8695uart_ports[0]);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void __exit ks8695uart_exit(void)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < SERIAL_KS8695_NR; i++)
|
|
uart_remove_one_port(&ks8695_reg, &ks8695uart_ports[0]);
|
|
uart_unregister_driver(&ks8695_reg);
|
|
}
|
|
|
|
module_init(ks8695uart_init);
|
|
module_exit(ks8695uart_exit);
|
|
|
|
MODULE_DESCRIPTION("KS8695 serial port driver");
|
|
MODULE_AUTHOR("Micrel Inc.");
|
|
MODULE_LICENSE("GPL");
|