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linux-next/arch/mips/include
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Maciej W. Rozycki 1054533a32 MIPS: mipsregs.h: Reindent CP0 Cause macros 
Reindent CP0 Cause macros for a single space after #define, leaving
extra indentation for individual Interrupt Pending bits as with CP0
Status register's Interrupt Mask bits.

[ralf@linux-mips.org: Fix conflict.]
[ralf@linux-mips.org: Fix indentation of the CAUSEB_FDCI and CAUSEF_FDCI
definitions.]

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9669/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-04-08 01:08:39 +02:00
..
asm MIPS: mipsregs.h: Reindent CP0 Cause macros 2015-04-08 01:08:39 +02:00
uapi/asm Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus 2015-02-21 19:41:38 -08:00