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e4f2379db6
Driver for non-standard on-chip ethernet device ARC EMAC 10/100, instantiated in some legacy ARC (Synopsys) FPGA Boards such as ARCAngel4/ML50x. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Andy Shevchenko <andy.shevchenko@gmail.com> Cc: Francois Romieu <romieu@fr.zoreil.com> Cc: Joe Perches <joe@perches.com> Cc: Vineet Gupta <vgupta@synopsys.com> Cc: Mischa Jonker <mjonker@synopsys.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Grant Likely <grant.likely@linaro.org> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: linux-kernel@vger.kernel.org Cc: devicetree-discuss@lists.ozlabs.org Cc: Florian Fainelli <florian@openwrt.org> Cc: David Laight <david.laight@aculab.com> Signed-off-by: David S. Miller <davem@davemloft.net>
215 lines
6.0 KiB
C
215 lines
6.0 KiB
C
/*
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* Copyright (C) 2004-2013 Synopsys, Inc. (www.synopsys.com)
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*
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* Registers and bits definitions of ARC EMAC
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*/
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#ifndef ARC_EMAC_H
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#define ARC_EMAC_H
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#include <linux/device.h>
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#include <linux/dma-mapping.h>
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#include <linux/netdevice.h>
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#include <linux/phy.h>
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/* STATUS and ENABLE Register bit masks */
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#define TXINT_MASK (1<<0) /* Transmit interrupt */
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#define RXINT_MASK (1<<1) /* Receive interrupt */
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#define ERR_MASK (1<<2) /* Error interrupt */
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#define TXCH_MASK (1<<3) /* Transmit chaining error interrupt */
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#define MSER_MASK (1<<4) /* Missed packet counter error */
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#define RXCR_MASK (1<<8) /* RXCRCERR counter rolled over */
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#define RXFR_MASK (1<<9) /* RXFRAMEERR counter rolled over */
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#define RXFL_MASK (1<<10) /* RXOFLOWERR counter rolled over */
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#define MDIO_MASK (1<<12) /* MDIO complete interrupt */
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#define TXPL_MASK (1<<31) /* Force polling of BD by EMAC */
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/* CONTROL Register bit masks */
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#define EN_MASK (1<<0) /* VMAC enable */
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#define TXRN_MASK (1<<3) /* TX enable */
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#define RXRN_MASK (1<<4) /* RX enable */
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#define DSBC_MASK (1<<8) /* Disable receive broadcast */
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#define ENFL_MASK (1<<10) /* Enable Full-duplex */
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#define PROM_MASK (1<<11) /* Promiscuous mode */
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/* Buffer descriptor INFO bit masks */
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#define OWN_MASK (1<<31) /* 0-CPU owns buffer, 1-EMAC owns buffer */
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#define FIRST_MASK (1<<16) /* First buffer in chain */
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#define LAST_MASK (1<<17) /* Last buffer in chain */
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#define LEN_MASK 0x000007FF /* last 11 bits */
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#define CRLS (1<<21)
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#define DEFR (1<<22)
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#define DROP (1<<23)
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#define RTRY (1<<24)
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#define LTCL (1<<28)
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#define UFLO (1<<29)
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#define FOR_EMAC OWN_MASK
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#define FOR_CPU 0
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/* ARC EMAC register set combines entries for MAC and MDIO */
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enum {
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R_ID = 0,
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R_STATUS,
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R_ENABLE,
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R_CTRL,
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R_POLLRATE,
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R_RXERR,
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R_MISS,
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R_TX_RING,
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R_RX_RING,
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R_ADDRL,
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R_ADDRH,
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R_LAFL,
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R_LAFH,
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R_MDIO,
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};
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#define TX_TIMEOUT (400*HZ/1000) /* Transmission timeout */
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#define ARC_EMAC_NAPI_WEIGHT 40 /* Workload for NAPI */
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#define EMAC_BUFFER_SIZE 1536 /* EMAC buffer size */
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/**
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* struct arc_emac_bd - EMAC buffer descriptor (BD).
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*
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* @info: Contains status information on the buffer itself.
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* @data: 32-bit byte addressable pointer to the packet data.
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*/
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struct arc_emac_bd {
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__le32 info;
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dma_addr_t data;
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};
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/* Number of Rx/Tx BD's */
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#define RX_BD_NUM 128
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#define TX_BD_NUM 128
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#define RX_RING_SZ (RX_BD_NUM * sizeof(struct arc_emac_bd))
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#define TX_RING_SZ (TX_BD_NUM * sizeof(struct arc_emac_bd))
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/**
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* struct buffer_state - Stores Rx/Tx buffer state.
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* @sk_buff: Pointer to socket buffer.
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* @addr: Start address of DMA-mapped memory region.
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* @len: Length of DMA-mapped memory region.
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*/
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struct buffer_state {
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struct sk_buff *skb;
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DEFINE_DMA_UNMAP_ADDR(addr);
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DEFINE_DMA_UNMAP_LEN(len);
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};
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/**
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* struct arc_emac_priv - Storage of EMAC's private information.
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* @dev: Pointer to the current device.
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* @ndev: Pointer to the current network device.
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* @phy_dev: Pointer to attached PHY device.
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* @bus: Pointer to the current MII bus.
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* @regs: Base address of EMAC memory-mapped control registers.
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* @napi: Structure for NAPI.
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* @stats: Network device statistics.
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* @rxbd: Pointer to Rx BD ring.
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* @txbd: Pointer to Tx BD ring.
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* @rxbd_dma: DMA handle for Rx BD ring.
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* @txbd_dma: DMA handle for Tx BD ring.
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* @rx_buff: Storage for Rx buffers states.
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* @tx_buff: Storage for Tx buffers states.
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* @txbd_curr: Index of Tx BD to use on the next "ndo_start_xmit".
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* @txbd_dirty: Index of Tx BD to free on the next Tx interrupt.
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* @last_rx_bd: Index of the last Rx BD we've got from EMAC.
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* @link: PHY's last seen link state.
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* @duplex: PHY's last set duplex mode.
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* @speed: PHY's last set speed.
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* @max_speed: Maximum supported by current system network data-rate.
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*/
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struct arc_emac_priv {
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/* Devices */
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struct device *dev;
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struct net_device *ndev;
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struct phy_device *phy_dev;
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struct mii_bus *bus;
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void __iomem *regs;
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struct napi_struct napi;
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struct net_device_stats stats;
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struct arc_emac_bd *rxbd;
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struct arc_emac_bd *txbd;
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dma_addr_t rxbd_dma;
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dma_addr_t txbd_dma;
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struct buffer_state rx_buff[RX_BD_NUM];
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struct buffer_state tx_buff[TX_BD_NUM];
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unsigned int txbd_curr;
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unsigned int txbd_dirty;
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unsigned int last_rx_bd;
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unsigned int link;
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unsigned int duplex;
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unsigned int speed;
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unsigned int max_speed;
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};
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/**
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* arc_reg_set - Sets EMAC register with provided value.
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* @priv: Pointer to ARC EMAC private data structure.
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* @reg: Register offset from base address.
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* @value: Value to set in register.
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*/
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static inline void arc_reg_set(struct arc_emac_priv *priv, int reg, int value)
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{
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iowrite32(value, priv->regs + reg * sizeof(int));
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}
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/**
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* arc_reg_get - Gets value of specified EMAC register.
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* @priv: Pointer to ARC EMAC private data structure.
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* @reg: Register offset from base address.
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*
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* returns: Value of requested register.
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*/
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static inline unsigned int arc_reg_get(struct arc_emac_priv *priv, int reg)
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{
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return ioread32(priv->regs + reg * sizeof(int));
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}
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/**
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* arc_reg_or - Applies mask to specified EMAC register - ("reg" | "mask").
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* @priv: Pointer to ARC EMAC private data structure.
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* @reg: Register offset from base address.
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* @mask: Mask to apply to specified register.
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*
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* This function reads initial register value, then applies provided mask
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* to it and then writes register back.
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*/
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static inline void arc_reg_or(struct arc_emac_priv *priv, int reg, int mask)
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{
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unsigned int value = arc_reg_get(priv, reg);
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arc_reg_set(priv, reg, value | mask);
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}
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/**
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* arc_reg_clr - Applies mask to specified EMAC register - ("reg" & ~"mask").
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* @priv: Pointer to ARC EMAC private data structure.
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* @reg: Register offset from base address.
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* @mask: Mask to apply to specified register.
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*
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* This function reads initial register value, then applies provided mask
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* to it and then writes register back.
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*/
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static inline void arc_reg_clr(struct arc_emac_priv *priv, int reg, int mask)
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{
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unsigned int value = arc_reg_get(priv, reg);
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arc_reg_set(priv, reg, value & ~mask);
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}
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int arc_mdio_probe(struct platform_device *pdev, struct arc_emac_priv *priv);
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int arc_mdio_remove(struct arc_emac_priv *priv);
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#endif /* ARC_EMAC_H */
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