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mirror of https://github.com/edk2-porting/linux-next.git synced 2024-12-31 16:43:51 +08:00
linux-next/drivers/clk/mediatek
Owen Chen a3ae549917 clk: mediatek: Add new clkmux register API
On both MT8183 & MT6765, there add "set/clr" register for
each clkmux setting, and one update register to trigger value change.
It is designed to prevent read-modify-write racing issue.
The sw design need to add a new API to handle this hw change with
a new mtk_clk_mux/mtk_mux struct in new file "clk-mux.c", "clk-mux.h".

Signed-off-by: Owen Chen <owen.chen@mediatek.com>
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Reviewed-by: James Liao <jamesjj.liao@mediatek.com>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
[sboyd@kernel.org: Squash in flags=0 to silence warning]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-04-11 13:12:40 -07:00
..
clk-apmixed.c clk: mediatek: Add USB clock support in MT8173 APMIXEDSYS 2015-10-01 12:06:00 +08:00
clk-cpumux.c clk: mediatek: Drop __init from mtk_clk_register_cpumuxes() 2018-11-30 00:39:19 -08:00
clk-cpumux.h clk: mediatek: add missing cpu mux causing Mediatek cpufreq can't work 2017-06-19 19:02:43 -07:00
clk-gate.c clk: mediatek: Add flags to mtk_gate 2019-02-26 09:53:39 -08:00
clk-gate.h clk: mediatek: Add flags to mtk_gate 2019-02-26 09:53:39 -08:00
clk-mt2701-aud.c clk: mediatek: add audsys support for MT2701 2018-03-20 00:24:42 -07:00
clk-mt2701-bdp.c clk: mediatek: Add MT2701 clock support 2016-11-08 15:59:49 -08:00
clk-mt2701-eth.c clk: mediatek: add mt2701 ethernet reset 2017-04-21 19:20:33 -07:00
clk-mt2701-g3d.c clk: mediatek: add g3dsys support for MT2701 and MT7623 2018-05-15 15:21:36 -07:00
clk-mt2701-hif.c reset: mediatek: Add MT2701 reset driver 2016-11-08 15:59:51 -08:00
clk-mt2701-img.c clk: mediatek: Add MT2701 clock support 2016-11-08 15:59:49 -08:00
clk-mt2701-mm.c clk: mediatek: Add MT2701 clock support 2016-11-08 15:59:49 -08:00
clk-mt2701-vdec.c clk: mediatek: Add MT2701 clock support 2016-11-08 15:59:49 -08:00
clk-mt2701.c clk: mediatek: using CLK_MUX_ROUND_CLOSEST for the clock of dpi1_sel 2019-02-25 09:19:33 -08:00
clk-mt2712-bdp.c clk: mediatek: Add MT2712 clock support 2017-11-02 01:02:53 -07:00
clk-mt2712-img.c clk: mediatek: Add MT2712 clock support 2017-11-02 01:02:53 -07:00
clk-mt2712-jpgdec.c clk: mediatek: Add MT2712 clock support 2017-11-02 01:02:53 -07:00
clk-mt2712-mfg.c clk: mediatek: Add MT2712 clock support 2017-11-02 01:02:53 -07:00
clk-mt2712-mm.c clk: mediatek: Add MT2712 clock support 2017-11-02 01:02:53 -07:00
clk-mt2712-vdec.c clk: mediatek: Add MT2712 clock support 2017-11-02 01:02:53 -07:00
clk-mt2712-venc.c clk: mediatek: Add MT2712 clock support 2017-11-02 01:02:53 -07:00
clk-mt2712.c Merge branches 'clk-typo', 'clk-json-schema', 'clk-mtk-2712-eco' and 'clk-rockchip' into clk-next 2019-03-08 10:34:22 -08:00
clk-mt6797-img.c clk: mediatek: add clk support for MT6797 2017-04-19 09:20:21 -07:00
clk-mt6797-mm.c clk: mediatek: add clk support for MT6797 2017-04-19 09:20:21 -07:00
clk-mt6797-vdec.c clk: mediatek: add clk support for MT6797 2017-04-19 09:20:21 -07:00
clk-mt6797-venc.c clk: mediatek: add clk support for MT6797 2017-04-19 09:20:21 -07:00
clk-mt6797.c clk: mediatek: Mark bus and DRAM related clocks as critical 2019-02-26 09:54:50 -08:00
clk-mt7622-aud.c clk: mediatek: add devm_of_platform_populate() for MT7622 audsys 2018-03-20 00:24:33 -07:00
clk-mt7622-eth.c clk: mediatek: add clock support for MT7622 SoC 2017-11-02 01:10:12 -07:00
clk-mt7622-hif.c clk: mediatek: add clock support for MT7622 SoC 2017-11-02 01:10:12 -07:00
clk-mt7622.c clk: mediatek: Drop more __init markings for driver probe 2018-11-30 00:39:39 -08:00
clk-mt7629-eth.c clk: mediatek: add clock support for MT7629 SoC 2018-11-29 22:52:05 -08:00
clk-mt7629-hif.c clk: mediatek: add clock support for MT7629 SoC 2018-11-29 22:52:05 -08:00
clk-mt7629.c clk: mediatek: fix the PCIe MAC clock parent 2018-12-05 12:30:30 -08:00
clk-mt8135.c clk: mediatek: Properly include clk.h 2015-07-20 10:53:09 -07:00
clk-mt8173.c clk: mediatek: correct cpu clock name for MT8173 SoC 2019-02-26 10:17:40 -08:00
clk-mtk.c Merge branches 'clk-ingenic', 'clk-mtk-mux', 'clk-qcom-sdm845-pcie', 'clk-mtk-crit' and 'clk-mtk' into clk-next 2019-03-08 10:29:30 -08:00
clk-mtk.h Merge branches 'clk-ingenic', 'clk-mtk-mux', 'clk-qcom-sdm845-pcie', 'clk-mtk-crit' and 'clk-mtk' into clk-next 2019-03-08 10:29:30 -08:00
clk-mux.c clk: mediatek: Add new clkmux register API 2019-04-11 13:12:40 -07:00
clk-mux.h clk: mediatek: Add new clkmux register API 2019-04-11 13:12:40 -07:00
clk-pll.c clk: mediatek: Disable tuner_en before change PLL rate 2019-04-11 13:09:17 -07:00
Kconfig clk: mediatek: add clock support for MT7629 SoC 2018-11-29 22:52:05 -08:00
Makefile clk: mediatek: Add new clkmux register API 2019-04-11 13:12:40 -07:00
reset.c clk: Convert to using %pOF instead of full_name 2017-07-21 15:49:54 -07:00