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9a8fd55899
The attached patches provides part 6 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
35 lines
900 B
C
35 lines
900 B
C
/*
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* include/asm-xtensa/scatterlist.h
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2001 - 2005 Tensilica Inc.
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*/
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#ifndef _XTENSA_SCATTERLIST_H
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#define _XTENSA_SCATTERLIST_H
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struct scatterlist {
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struct page *page;
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unsigned int offset;
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dma_addr_t dma_address;
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unsigned int length;
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};
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/*
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* These macros should be used after a pci_map_sg call has been done
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* to get bus addresses of each of the SG entries and their lengths.
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* You should only work with the number of sg entries pci_map_sg
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* returns, or alternatively stop on the first sg_dma_len(sg) which
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* is 0.
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*/
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#define sg_dma_address(sg) ((sg)->dma_address)
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#define sg_dma_len(sg) ((sg)->length)
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#define ISA_DMA_THRESHOLD (~0UL)
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#endif /* _XTENSA_SCATTERLIST_H */
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