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a19ae1eccf
This patch adds generic handling function as well as all functions to send specific commands to the IOMMU hardware as required by this driver. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Cc: iommu@lists.linux-foundation.org Cc: bhavna.sarathy@amd.com Cc: Sebastian.Biemueller@amd.com Cc: robert.richter@amd.com Cc: joro@8bytes.org Signed-off-by: Ingo Molnar <mingo@elte.hu>
147 lines
3.5 KiB
C
147 lines
3.5 KiB
C
/*
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* Copyright (C) 2007-2008 Advanced Micro Devices, Inc.
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* Author: Joerg Roedel <joerg.roedel@amd.com>
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* Leo Duran <leo.duran@amd.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/pci.h>
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#include <linux/gfp.h>
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#include <linux/bitops.h>
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#include <linux/scatterlist.h>
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#include <linux/iommu-helper.h>
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#include <asm/proto.h>
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#include <asm/gart.h>
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#include <asm/amd_iommu_types.h>
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#define CMD_SET_TYPE(cmd, t) ((cmd)->data[1] |= ((t) << 28))
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#define to_pages(addr, size) \
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(round_up(((addr) & ~PAGE_MASK) + (size), PAGE_SIZE) >> PAGE_SHIFT)
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static DEFINE_RWLOCK(amd_iommu_devtable_lock);
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struct command {
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u32 data[4];
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};
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static int __iommu_queue_command(struct amd_iommu *iommu, struct command *cmd)
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{
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u32 tail, head;
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u8 *target;
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tail = readl(iommu->mmio_base + MMIO_CMD_TAIL_OFFSET);
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target = (iommu->cmd_buf + tail);
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memcpy_toio(target, cmd, sizeof(*cmd));
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tail = (tail + sizeof(*cmd)) % iommu->cmd_buf_size;
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head = readl(iommu->mmio_base + MMIO_CMD_HEAD_OFFSET);
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if (tail == head)
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return -ENOMEM;
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writel(tail, iommu->mmio_base + MMIO_CMD_TAIL_OFFSET);
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return 0;
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}
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static int iommu_queue_command(struct amd_iommu *iommu, struct command *cmd)
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{
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unsigned long flags;
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int ret;
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spin_lock_irqsave(&iommu->lock, flags);
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ret = __iommu_queue_command(iommu, cmd);
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spin_unlock_irqrestore(&iommu->lock, flags);
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return ret;
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}
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static int iommu_completion_wait(struct amd_iommu *iommu)
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{
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int ret;
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struct command cmd;
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volatile u64 ready = 0;
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unsigned long ready_phys = virt_to_phys(&ready);
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memset(&cmd, 0, sizeof(cmd));
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cmd.data[0] = LOW_U32(ready_phys) | CMD_COMPL_WAIT_STORE_MASK;
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cmd.data[1] = HIGH_U32(ready_phys);
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cmd.data[2] = 1; /* value written to 'ready' */
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CMD_SET_TYPE(&cmd, CMD_COMPL_WAIT);
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iommu->need_sync = 0;
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ret = iommu_queue_command(iommu, &cmd);
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if (ret)
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return ret;
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while (!ready)
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cpu_relax();
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return 0;
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}
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static int iommu_queue_inv_dev_entry(struct amd_iommu *iommu, u16 devid)
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{
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struct command cmd;
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BUG_ON(iommu == NULL);
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memset(&cmd, 0, sizeof(cmd));
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CMD_SET_TYPE(&cmd, CMD_INV_DEV_ENTRY);
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cmd.data[0] = devid;
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iommu->need_sync = 1;
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return iommu_queue_command(iommu, &cmd);
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}
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static int iommu_queue_inv_iommu_pages(struct amd_iommu *iommu,
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u64 address, u16 domid, int pde, int s)
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{
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struct command cmd;
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memset(&cmd, 0, sizeof(cmd));
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address &= PAGE_MASK;
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CMD_SET_TYPE(&cmd, CMD_INV_IOMMU_PAGES);
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cmd.data[1] |= domid;
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cmd.data[2] = LOW_U32(address);
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cmd.data[3] = HIGH_U32(address);
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if (s)
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cmd.data[2] |= CMD_INV_IOMMU_PAGES_SIZE_MASK;
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if (pde)
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cmd.data[2] |= CMD_INV_IOMMU_PAGES_PDE_MASK;
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iommu->need_sync = 1;
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return iommu_queue_command(iommu, &cmd);
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}
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static int iommu_flush_pages(struct amd_iommu *iommu, u16 domid,
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u64 address, size_t size)
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{
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int i;
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unsigned pages = to_pages(address, size);
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address &= PAGE_MASK;
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for (i = 0; i < pages; ++i) {
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iommu_queue_inv_iommu_pages(iommu, address, domid, 0, 0);
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address += PAGE_SIZE;
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}
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return 0;
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}
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