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9b43e5ec89
This patch adds a binding that describes the Rockchip usb PHYs found on Rockchip SoCs usb interface. Signed-off-by: Yunzhi Li <lyz@rock-chips.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
38 lines
850 B
Plaintext
38 lines
850 B
Plaintext
ROCKCHIP USB2 PHY
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Required properties:
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- compatible: rockchip,rk3288-usb-phy
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- rockchip,grf : phandle to the syscon managing the "general
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register files"
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- #address-cells: should be 1
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- #size-cells: should be 0
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Sub-nodes:
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Each PHY should be represented as a sub-node.
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Sub-nodes
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required properties:
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- #phy-cells: should be 0
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- reg: PHY configure reg address offset in GRF
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"0x320" - for PHY attach to OTG controller
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"0x334" - for PHY attach to HOST0 controller
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"0x348" - for PHY attach to HOST1 controller
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Optional Properties:
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- clocks : phandle + clock specifier for the phy clocks
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- clock-names: string, clock name, must be "phyclk"
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Example:
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usbphy: phy {
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compatible = "rockchip,rk3288-usb-phy";
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rockchip,grf = <&grf>;
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#address-cells = <1>;
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#size-cells = <0>;
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usbphy0: usb-phy0 {
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#phy-cells = <0>;
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reg = <0x320>;
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};
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};
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