mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-28 07:04:00 +08:00
0268099c89
Naming convention was changed in dts file but the clock binding documentation hasn't been updated. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> Acked-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
49 lines
1.7 KiB
Plaintext
49 lines
1.7 KiB
Plaintext
Binding for a type of quad channel digital frequency synthesizer found on
|
|
certain STMicroelectronics consumer electronics SoC devices.
|
|
|
|
This version contains a programmable PLL which can generate up to 216, 432
|
|
or 660MHz (from a 30MHz oscillator input) as the input to the digital
|
|
synthesizers.
|
|
|
|
This binding uses the common clock binding[1].
|
|
|
|
[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
|
|
|
|
Required properties:
|
|
- compatible : shall be:
|
|
"st,stih416-quadfs216", "st,quadfs"
|
|
"st,stih416-quadfs432", "st,quadfs"
|
|
"st,stih416-quadfs660-E", "st,quadfs"
|
|
"st,stih416-quadfs660-F", "st,quadfs"
|
|
"st,stih407-quadfs660-C", "st,quadfs"
|
|
"st,stih407-quadfs660-D", "st,quadfs"
|
|
|
|
|
|
- #clock-cells : from common clock binding; shall be set to 1.
|
|
|
|
- reg : A Base address and length of the register set.
|
|
|
|
- clocks : from common clock binding
|
|
|
|
- clock-output-names : From common clock binding. The block has 4
|
|
clock outputs but not all of them in a specific instance
|
|
have to be used in the SoC. If a clock name is left as
|
|
an empty string then no clock will be created for the
|
|
output associated with that string index. If fewer than
|
|
4 strings are provided then no clocks will be created
|
|
for the remaining outputs.
|
|
|
|
Example:
|
|
|
|
clockgen_e: clockgen-e@fd3208bc {
|
|
#clock-cells = <1>;
|
|
compatible = "st,stih416-quadfs660-E", "st,quadfs";
|
|
reg = <0xfd3208bc 0xB0>;
|
|
|
|
clocks = <&clk_sysin>;
|
|
clock-output-names = "clk-m-pix-mdtp-0",
|
|
"clk-m-pix-mdtp-1",
|
|
"clk-m-pix-mdtp-2",
|
|
"clk-m-mpelpc";
|
|
};
|