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a048fe996b
The pllv4 supports fractional-N function, the formula is:
PLL output freq = input * (mult + num/denom),
This patch adds fractional-N function support, including
clock round rate, calculate rate and set rate, with this
patch, the clock rate of APLL in clock tree is more accurate
than before:
Without fraction:
apll_pre_sel 1 1 1 24000000 0 0 50000
apll_pre_div 1 1 2 24000000 0 0 50000
apll 1 1 2 528000000 0 0 50000
apll_pfd3 0 0 0 792000000 0 0 50000
apll_pfd2 0 0 0 339428571 0 0 50000
apll_pfd1 0 0 0 352000000 0 0 50000
usdhc0 0 0 0 352000000 0 0 50000
apll_pfd0 1 1 1 352000000 0 0 50000
With fraction:
apll_pre_sel 1 1 1 24000000 0 0 50000
apll_pre_div 1 1 2 24000000 0 0 50000
apll 1 1 2 529200000 0 0 50000
apll_pfd3 0 0 0 793800000 0 0 50000
apll_pfd2 0 0 0 340200000 0 0 50000
apll_pfd1 0 0 0 352800000 0 0 50000
usdhc0 0 0 0 352800000 0 0 50000
apll_pfd0 1 1 1 352800000 0 0 50000
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
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| .. | ||
| clk-busy.c | ||
| clk-composite-7ulp.c | ||
| clk-composite-8m.c | ||
| clk-cpu.c | ||
| clk-divider-gate.c | ||
| clk-fixup-div.c | ||
| clk-fixup-mux.c | ||
| clk-frac-pll.c | ||
| clk-gate2.c | ||
| clk-gate-exclusive.c | ||
| clk-imx1.c | ||
| clk-imx5.c | ||
| clk-imx6q.c | ||
| clk-imx6sl.c | ||
| clk-imx6sll.c | ||
| clk-imx6sx.c | ||
| clk-imx6ul.c | ||
| clk-imx7d.c | ||
| clk-imx7ulp.c | ||
| clk-imx8mm.c | ||
| clk-imx8mq.c | ||
| clk-imx8qxp-lpcg.c | ||
| clk-imx8qxp-lpcg.h | ||
| clk-imx8qxp.c | ||
| clk-imx21.c | ||
| clk-imx25.c | ||
| clk-imx27.c | ||
| clk-imx31.c | ||
| clk-imx35.c | ||
| clk-lpcg-scu.c | ||
| clk-pfd.c | ||
| clk-pfdv2.c | ||
| clk-pll14xx.c | ||
| clk-pllv1.c | ||
| clk-pllv2.c | ||
| clk-pllv3.c | ||
| clk-pllv4.c | ||
| clk-sccg-pll.c | ||
| clk-scu.c | ||
| clk-scu.h | ||
| clk-vf610.c | ||
| clk.c | ||
| clk.h | ||
| Kconfig | ||
| Makefile | ||