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e090d506c3
This patch adds a new MFD driver for the RDC321x southbridge. This southbridge is always present in the RDC321x System-on-a-Chip and provides access to some GPIOs as well as a watchdog. Access to these two functions is done using the southbridge PCI device configuration space. Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
27 lines
552 B
C
27 lines
552 B
C
#ifndef __RDC321X_MFD_H
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#define __RDC321X_MFD_H
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#include <linux/types.h>
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#include <linux/pci.h>
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/* Offsets to be accessed in the southbridge PCI
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* device configuration register */
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#define RDC321X_WDT_CTRL 0x44
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#define RDC321X_GPIO_CTRL_REG1 0x48
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#define RDC321X_GPIO_DATA_REG1 0x4c
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#define RDC321X_GPIO_CTRL_REG2 0x84
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#define RDC321X_GPIO_DATA_REG2 0x88
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#define RDC321X_MAX_GPIO 58
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struct rdc321x_gpio_pdata {
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struct pci_dev *sb_pdev;
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unsigned max_gpios;
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};
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struct rdc321x_wdt_pdata {
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struct pci_dev *sb_pdev;
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};
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#endif /* __RDC321X_MFD_H */
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