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926b65e20d
This patch provides bindings for the 64-bit timer in the KeyStone architecture devices. The timer can be configured as a general-purpose 64-bit timer, dual general-purpose 32-bit timers. When configured as dual 32-bit timers, each half can operate in conjunction (chain mode) or independently (unchained mode) of each other. It is global timer is a free running up-counter and can generate interrupt when the counter reaches preset counter values. Documentation: http://www.ti.com/lit/ug/sprugv5a/sprugv5a.pdf Acked-by: Rob Herring <robh@kernel.org> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> |
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allwinner,sun4i-timer.txt | ||
allwinner,sun5i-a13-hstimer.txt | ||
arm,sp804.txt | ||
brcm,bcm2835-system-timer.txt | ||
cadence,ttc-timer.txt | ||
efm32,timer.txt | ||
fsl,imxgpt.txt | ||
lsi,zevio-timer.txt | ||
marvell,armada-370-xp-timer.txt | ||
marvell,orion-timer.txt | ||
moxa,moxart-timer.txt | ||
nvidia,tegra20-timer.txt | ||
nvidia,tegra30-timer.txt | ||
samsung,exynos4210-mct.txt | ||
stericsson-u300-apptimer.txt | ||
ti,keystone-timer.txt |