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51c1327876
The SH Mobile LCD controller (LCDC) DRM driver supports the main graphics plane in RGB and YUV formats, as well as the overlay planes (in alpha-blending mode only). Only flat panel outputs using the parallel interface are supported. Support for SYS panels, HDMI and DSI is currently not implemented. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
100 lines
2.9 KiB
C
100 lines
2.9 KiB
C
/*
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* shmob_drm.h -- SH Mobile DRM driver
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*
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* Copyright (C) 2012 Renesas Corporation
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*
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* Laurent Pinchart (laurent.pinchart@ideasonboard.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef __SHMOB_DRM_H__
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#define __SHMOB_DRM_H__
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#include <linux/kernel.h>
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#include <drm/drm_mode.h>
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struct sh_mobile_meram_cfg;
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struct sh_mobile_meram_info;
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enum shmob_drm_clk_source {
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SHMOB_DRM_CLK_BUS,
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SHMOB_DRM_CLK_PERIPHERAL,
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SHMOB_DRM_CLK_EXTERNAL,
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};
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enum shmob_drm_interface {
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SHMOB_DRM_IFACE_RGB8, /* 24bpp, 8:8:8 */
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SHMOB_DRM_IFACE_RGB9, /* 18bpp, 9:9 */
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SHMOB_DRM_IFACE_RGB12A, /* 24bpp, 12:12 */
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SHMOB_DRM_IFACE_RGB12B, /* 12bpp */
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SHMOB_DRM_IFACE_RGB16, /* 16bpp */
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SHMOB_DRM_IFACE_RGB18, /* 18bpp */
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SHMOB_DRM_IFACE_RGB24, /* 24bpp */
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SHMOB_DRM_IFACE_YUV422, /* 16bpp */
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SHMOB_DRM_IFACE_SYS8A, /* 24bpp, 8:8:8 */
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SHMOB_DRM_IFACE_SYS8B, /* 18bpp, 8:8:2 */
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SHMOB_DRM_IFACE_SYS8C, /* 18bpp, 2:8:8 */
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SHMOB_DRM_IFACE_SYS8D, /* 16bpp, 8:8 */
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SHMOB_DRM_IFACE_SYS9, /* 18bpp, 9:9 */
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SHMOB_DRM_IFACE_SYS12, /* 24bpp, 12:12 */
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SHMOB_DRM_IFACE_SYS16A, /* 16bpp */
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SHMOB_DRM_IFACE_SYS16B, /* 18bpp, 16:2 */
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SHMOB_DRM_IFACE_SYS16C, /* 18bpp, 2:16 */
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SHMOB_DRM_IFACE_SYS18, /* 18bpp */
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SHMOB_DRM_IFACE_SYS24, /* 24bpp */
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};
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struct shmob_drm_backlight_data {
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const char *name;
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int max_brightness;
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int (*get_brightness)(void);
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int (*set_brightness)(int brightness);
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};
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struct shmob_drm_panel_data {
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unsigned int width_mm; /* Panel width in mm */
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unsigned int height_mm; /* Panel height in mm */
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struct drm_mode_modeinfo mode;
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};
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struct shmob_drm_sys_interface_data {
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unsigned int read_latch:6;
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unsigned int read_setup:8;
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unsigned int read_cycle:8;
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unsigned int read_strobe:8;
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unsigned int write_setup:8;
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unsigned int write_cycle:8;
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unsigned int write_strobe:8;
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unsigned int cs_setup:3;
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unsigned int vsync_active_high:1;
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unsigned int vsync_dir_input:1;
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};
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#define SHMOB_DRM_IFACE_FL_DWPOL (1 << 0) /* Rising edge dot clock data latch */
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#define SHMOB_DRM_IFACE_FL_DIPOL (1 << 1) /* Active low display enable */
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#define SHMOB_DRM_IFACE_FL_DAPOL (1 << 2) /* Active low display data */
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#define SHMOB_DRM_IFACE_FL_HSCNT (1 << 3) /* Disable HSYNC during VBLANK */
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#define SHMOB_DRM_IFACE_FL_DWCNT (1 << 4) /* Disable dotclock during blanking */
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struct shmob_drm_interface_data {
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enum shmob_drm_interface interface;
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struct shmob_drm_sys_interface_data sys;
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unsigned int clk_div;
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unsigned int flags;
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};
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struct shmob_drm_platform_data {
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enum shmob_drm_clk_source clk_source;
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struct shmob_drm_interface_data iface;
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struct shmob_drm_panel_data panel;
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struct shmob_drm_backlight_data backlight;
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const struct sh_mobile_meram_cfg *meram;
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};
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#endif /* __SHMOB_DRM_H__ */
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