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https://github.com/edk2-porting/linux-next.git
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21f7541d88
This change changes the tps65910-irq code to use irqdomain, and support initialization from devicetree. This assumes that the irq_base in the platform data is -1 if devicetree is used. Signed-off-by: Rhyland Klein <rklein@nvidia.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
261 lines
6.5 KiB
C
261 lines
6.5 KiB
C
/*
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* tps65910-irq.c -- TI TPS6591x
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*
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* Copyright 2010 Texas Instruments Inc.
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*
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* Author: Graeme Gregory <gg@slimlogic.co.uk>
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* Author: Jorge Eduardo Candelaria <jedu@slimlogic.co.uk>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/bug.h>
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#include <linux/device.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/irqdomain.h>
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#include <linux/gpio.h>
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#include <linux/mfd/tps65910.h>
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/*
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* This is a threaded IRQ handler so can access I2C/SPI. Since all
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* interrupts are clear on read the IRQ line will be reasserted and
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* the physical IRQ will be handled again if another interrupt is
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* asserted while we run - in the normal course of events this is a
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* rare occurrence so we save I2C/SPI reads. We're also assuming that
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* it's rare to get lots of interrupts firing simultaneously so try to
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* minimise I/O.
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*/
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static irqreturn_t tps65910_irq(int irq, void *irq_data)
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{
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struct tps65910 *tps65910 = irq_data;
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unsigned int reg;
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u32 irq_sts;
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u32 irq_mask;
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int i;
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tps65910_reg_read(tps65910, TPS65910_INT_STS, ®);
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irq_sts = reg;
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tps65910_reg_read(tps65910, TPS65910_INT_STS2, ®);
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irq_sts |= reg << 8;
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switch (tps65910_chip_id(tps65910)) {
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case TPS65911:
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tps65910_reg_read(tps65910, TPS65910_INT_STS3, ®);
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irq_sts |= reg << 16;
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}
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tps65910_reg_read(tps65910, TPS65910_INT_MSK, ®);
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irq_mask = reg;
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tps65910_reg_read(tps65910, TPS65910_INT_MSK2, ®);
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irq_mask |= reg << 8;
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switch (tps65910_chip_id(tps65910)) {
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case TPS65911:
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tps65910_reg_read(tps65910, TPS65910_INT_MSK3, ®);
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irq_mask |= reg << 16;
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}
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irq_sts &= ~irq_mask;
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if (!irq_sts)
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return IRQ_NONE;
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for (i = 0; i < tps65910->irq_num; i++) {
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if (!(irq_sts & (1 << i)))
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continue;
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handle_nested_irq(irq_find_mapping(tps65910->domain, i));
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}
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/* Write the STS register back to clear IRQs we handled */
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reg = irq_sts & 0xFF;
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irq_sts >>= 8;
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tps65910_reg_write(tps65910, TPS65910_INT_STS, reg);
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reg = irq_sts & 0xFF;
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tps65910_reg_write(tps65910, TPS65910_INT_STS2, reg);
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switch (tps65910_chip_id(tps65910)) {
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case TPS65911:
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reg = irq_sts >> 8;
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tps65910_reg_write(tps65910, TPS65910_INT_STS3, reg);
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}
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return IRQ_HANDLED;
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}
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static void tps65910_irq_lock(struct irq_data *data)
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{
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struct tps65910 *tps65910 = irq_data_get_irq_chip_data(data);
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mutex_lock(&tps65910->irq_lock);
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}
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static void tps65910_irq_sync_unlock(struct irq_data *data)
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{
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struct tps65910 *tps65910 = irq_data_get_irq_chip_data(data);
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u32 reg_mask;
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unsigned int reg;
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tps65910_reg_read(tps65910, TPS65910_INT_MSK, ®);
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reg_mask = reg;
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tps65910_reg_read(tps65910, TPS65910_INT_MSK2, ®);
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reg_mask |= reg << 8;
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switch (tps65910_chip_id(tps65910)) {
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case TPS65911:
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tps65910_reg_read(tps65910, TPS65910_INT_MSK3, ®);
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reg_mask |= reg << 16;
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}
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if (tps65910->irq_mask != reg_mask) {
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reg = tps65910->irq_mask & 0xFF;
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tps65910_reg_write(tps65910, TPS65910_INT_MSK, reg);
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reg = tps65910->irq_mask >> 8 & 0xFF;
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tps65910_reg_write(tps65910, TPS65910_INT_MSK2, reg);
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switch (tps65910_chip_id(tps65910)) {
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case TPS65911:
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reg = tps65910->irq_mask >> 16;
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tps65910_reg_write(tps65910, TPS65910_INT_MSK3, reg);
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}
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}
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mutex_unlock(&tps65910->irq_lock);
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}
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static void tps65910_irq_enable(struct irq_data *data)
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{
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struct tps65910 *tps65910 = irq_data_get_irq_chip_data(data);
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tps65910->irq_mask &= ~(1 << data->hwirq);
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}
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static void tps65910_irq_disable(struct irq_data *data)
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{
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struct tps65910 *tps65910 = irq_data_get_irq_chip_data(data);
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tps65910->irq_mask |= (1 << data->hwirq);
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}
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#ifdef CONFIG_PM_SLEEP
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static int tps65910_irq_set_wake(struct irq_data *data, unsigned int enable)
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{
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struct tps65910 *tps65910 = irq_data_get_irq_chip_data(data);
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return irq_set_irq_wake(tps65910->chip_irq, enable);
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}
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#else
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#define tps65910_irq_set_wake NULL
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#endif
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static struct irq_chip tps65910_irq_chip = {
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.name = "tps65910",
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.irq_bus_lock = tps65910_irq_lock,
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.irq_bus_sync_unlock = tps65910_irq_sync_unlock,
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.irq_disable = tps65910_irq_disable,
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.irq_enable = tps65910_irq_enable,
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.irq_set_wake = tps65910_irq_set_wake,
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};
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static int tps65910_irq_map(struct irq_domain *h, unsigned int virq,
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irq_hw_number_t hw)
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{
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struct tps65910 *tps65910 = h->host_data;
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irq_set_chip_data(virq, tps65910);
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irq_set_chip_and_handler(virq, &tps65910_irq_chip, handle_edge_irq);
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irq_set_nested_thread(virq, 1);
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/* ARM needs us to explicitly flag the IRQ as valid
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* and will set them noprobe when we do so. */
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#ifdef CONFIG_ARM
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set_irq_flags(virq, IRQF_VALID);
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#else
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irq_set_noprobe(virq);
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#endif
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return 0;
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}
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static struct irq_domain_ops tps65910_domain_ops = {
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.map = tps65910_irq_map,
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.xlate = irq_domain_xlate_twocell,
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};
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int tps65910_irq_init(struct tps65910 *tps65910, int irq,
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struct tps65910_platform_data *pdata)
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{
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int ret;
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int flags = IRQF_ONESHOT;
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if (!irq) {
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dev_warn(tps65910->dev, "No interrupt support, no core IRQ\n");
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return -EINVAL;
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}
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if (!pdata) {
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dev_warn(tps65910->dev, "No interrupt support, no pdata\n");
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return -EINVAL;
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}
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switch (tps65910_chip_id(tps65910)) {
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case TPS65910:
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tps65910->irq_num = TPS65910_NUM_IRQ;
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break;
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case TPS65911:
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tps65910->irq_num = TPS65911_NUM_IRQ;
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break;
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}
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if (pdata->irq_base > 0) {
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pdata->irq_base = irq_alloc_descs(pdata->irq_base, 0,
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tps65910->irq_num, -1);
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if (pdata->irq_base < 0) {
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dev_warn(tps65910->dev, "Failed to alloc IRQs: %d\n",
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pdata->irq_base);
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return pdata->irq_base;
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}
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}
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tps65910->irq_mask = 0xFFFFFF;
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mutex_init(&tps65910->irq_lock);
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tps65910->chip_irq = irq;
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tps65910->irq_base = pdata->irq_base;
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if (pdata->irq_base > 0)
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tps65910->domain = irq_domain_add_legacy(tps65910->dev->of_node,
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tps65910->irq_num,
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pdata->irq_base,
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0,
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&tps65910_domain_ops, tps65910);
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else
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tps65910->domain = irq_domain_add_linear(tps65910->dev->of_node,
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tps65910->irq_num,
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&tps65910_domain_ops, tps65910);
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if (!tps65910->domain) {
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dev_err(tps65910->dev, "Failed to create IRQ domain\n");
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return -ENOMEM;
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}
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ret = request_threaded_irq(irq, NULL, tps65910_irq, flags,
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"tps65910", tps65910);
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irq_set_irq_type(irq, IRQ_TYPE_LEVEL_LOW);
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if (ret != 0)
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dev_err(tps65910->dev, "Failed to request IRQ: %d\n", ret);
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return ret;
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}
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int tps65910_irq_exit(struct tps65910 *tps65910)
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{
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if (tps65910->chip_irq)
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free_irq(tps65910->chip_irq, tps65910);
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return 0;
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}
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