Helmut Klein 9dc6bd7678 clk: meson-gxbb: expose UART clocks ... Expose the clock ids of the three none AO uarts to the dt-bindings Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Helmut Klein <hgkr.klein@gmail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> [tidy the commit message to match similar change] Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>		2017-05-29 12:33:08 +00:00
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clk-audio-divider.c	clk: meson: add audio clock divider support	2017-04-07 16:50:44 +02:00
clk-cpu.c	clk: meson8b: clean up cpu clocks	2016-06-22 18:02:35 -07:00
clk-mpll.c	clk: meson: mpll: use 64bit math in rate_from_params	2017-04-07 17:45:30 +02:00
clk-pll.c	clk: meson: Add support for parameters for specific PLLs	2017-04-04 12:05:12 -07:00
clkc.h	clk: meson: add audio clock divider support	2017-04-07 16:50:44 +02:00
gxbb-aoclk.c	clk: meson: Fix invalid use of sizeof in gxbb_aoclkc_probe()	2016-08-24 00:55:13 -07:00
gxbb.c	clk: meson: gxbb: add cts_i958 clock	2017-04-07 16:50:46 +02:00
gxbb.h	clk: meson-gxbb: expose UART clocks	2017-05-29 12:33:08 +00:00
Kconfig	clk: gxbb: add AmLogic GXBB clk controller driver	2016-06-22 18:07:31 -07:00
Makefile	clk: meson: add audio clock divider support	2017-04-07 16:50:44 +02:00
meson8b.c	clk: meson8b: add the mplls clocks 0, 1 and 2	2017-03-27 12:30:27 -07:00
meson8b.h	clk: meson8b: add the mplls clocks 0, 1 and 2	2017-03-27 12:30:27 -07:00