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9cea6249c9
These two bits are merged at the external interface level for the IRQ, Interrupt, and GpioInt resource descriptors. However, these bits are logically independent and there is no need to keep them merged internally. Therefore, this change splits the bits into "sharable" and "wake capable" fields within the resource manager. This simplifies drive code that needs to examine these bits. Aaron Lu, Bob Moore. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
308 lines
9.2 KiB
C
308 lines
9.2 KiB
C
/*******************************************************************************
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*
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* Module Name: rsirq - IRQ resource descriptors
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*
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******************************************************************************/
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/*
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* Copyright (C) 2000 - 2012, Intel Corp.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions, and the following disclaimer,
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* without modification.
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* 2. Redistributions in binary form must reproduce at minimum a disclaimer
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* substantially similar to the "NO WARRANTY" disclaimer below
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* ("Disclaimer") and any redistribution must be conditioned upon
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* including a substantially similar Disclaimer requirement for further
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* binary redistribution.
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* 3. Neither the names of the above-listed copyright holders nor the names
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* of any contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* Alternatively, this software may be distributed under the terms of the
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* GNU General Public License ("GPL") version 2 as published by the Free
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* Software Foundation.
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*
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* NO WARRANTY
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
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* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGES.
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*/
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#include <acpi/acpi.h>
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#include "accommon.h"
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#include "acresrc.h"
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#define _COMPONENT ACPI_RESOURCES
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ACPI_MODULE_NAME("rsirq")
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/*******************************************************************************
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*
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* acpi_rs_get_irq
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*
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******************************************************************************/
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struct acpi_rsconvert_info acpi_rs_get_irq[9] = {
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{ACPI_RSC_INITGET, ACPI_RESOURCE_TYPE_IRQ,
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ACPI_RS_SIZE(struct acpi_resource_irq),
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ACPI_RSC_TABLE_SIZE(acpi_rs_get_irq)},
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/* Get the IRQ mask (bytes 1:2) */
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{ACPI_RSC_BITMASK16, ACPI_RS_OFFSET(data.irq.interrupts[0]),
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AML_OFFSET(irq.irq_mask),
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ACPI_RS_OFFSET(data.irq.interrupt_count)},
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/* Set default flags (others are zero) */
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{ACPI_RSC_SET8, ACPI_RS_OFFSET(data.irq.triggering),
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ACPI_EDGE_SENSITIVE,
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1},
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/* Get the descriptor length (2 or 3 for IRQ descriptor) */
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{ACPI_RSC_2BITFLAG, ACPI_RS_OFFSET(data.irq.descriptor_length),
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AML_OFFSET(irq.descriptor_type),
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0},
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/* All done if no flag byte present in descriptor */
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{ACPI_RSC_EXIT_NE, ACPI_RSC_COMPARE_AML_LENGTH, 0, 3},
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/* Get flags: Triggering[0], Polarity[3], Sharing[4], Wake[5] */
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{ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.irq.triggering),
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AML_OFFSET(irq.flags),
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0},
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{ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.irq.polarity),
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AML_OFFSET(irq.flags),
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3},
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{ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.irq.sharable),
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AML_OFFSET(irq.flags),
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4},
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{ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.irq.wake_capable),
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AML_OFFSET(irq.flags),
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5}
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};
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/*******************************************************************************
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*
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* acpi_rs_set_irq
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*
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******************************************************************************/
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struct acpi_rsconvert_info acpi_rs_set_irq[14] = {
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/* Start with a default descriptor of length 3 */
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{ACPI_RSC_INITSET, ACPI_RESOURCE_NAME_IRQ,
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sizeof(struct aml_resource_irq),
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ACPI_RSC_TABLE_SIZE(acpi_rs_set_irq)},
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/* Convert interrupt list to 16-bit IRQ bitmask */
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{ACPI_RSC_BITMASK16, ACPI_RS_OFFSET(data.irq.interrupts[0]),
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AML_OFFSET(irq.irq_mask),
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ACPI_RS_OFFSET(data.irq.interrupt_count)},
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/* Set flags: Triggering[0], Polarity[3], Sharing[4], Wake[5] */
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{ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.irq.triggering),
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AML_OFFSET(irq.flags),
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0},
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{ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.irq.polarity),
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AML_OFFSET(irq.flags),
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3},
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{ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.irq.sharable),
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AML_OFFSET(irq.flags),
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4},
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{ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.irq.wake_capable),
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AML_OFFSET(irq.flags),
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5},
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/*
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* All done if the output descriptor length is required to be 3
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* (i.e., optimization to 2 bytes cannot be attempted)
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*/
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{ACPI_RSC_EXIT_EQ, ACPI_RSC_COMPARE_VALUE,
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ACPI_RS_OFFSET(data.irq.descriptor_length),
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3},
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/* Set length to 2 bytes (no flags byte) */
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{ACPI_RSC_LENGTH, 0, 0, sizeof(struct aml_resource_irq_noflags)},
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/*
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* All done if the output descriptor length is required to be 2.
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*
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* TBD: Perhaps we should check for error if input flags are not
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* compatible with a 2-byte descriptor.
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*/
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{ACPI_RSC_EXIT_EQ, ACPI_RSC_COMPARE_VALUE,
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ACPI_RS_OFFSET(data.irq.descriptor_length),
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2},
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/* Reset length to 3 bytes (descriptor with flags byte) */
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{ACPI_RSC_LENGTH, 0, 0, sizeof(struct aml_resource_irq)},
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/*
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* Check if the flags byte is necessary. Not needed if the flags are:
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* ACPI_EDGE_SENSITIVE, ACPI_ACTIVE_HIGH, ACPI_EXCLUSIVE
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*/
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{ACPI_RSC_EXIT_NE, ACPI_RSC_COMPARE_VALUE,
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ACPI_RS_OFFSET(data.irq.triggering),
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ACPI_EDGE_SENSITIVE},
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{ACPI_RSC_EXIT_NE, ACPI_RSC_COMPARE_VALUE,
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ACPI_RS_OFFSET(data.irq.polarity),
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ACPI_ACTIVE_HIGH},
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{ACPI_RSC_EXIT_NE, ACPI_RSC_COMPARE_VALUE,
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ACPI_RS_OFFSET(data.irq.sharable),
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ACPI_EXCLUSIVE},
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/* We can optimize to a 2-byte irq_no_flags() descriptor */
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{ACPI_RSC_LENGTH, 0, 0, sizeof(struct aml_resource_irq_noflags)}
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};
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/*******************************************************************************
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*
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* acpi_rs_convert_ext_irq
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*
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******************************************************************************/
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struct acpi_rsconvert_info acpi_rs_convert_ext_irq[10] = {
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{ACPI_RSC_INITGET, ACPI_RESOURCE_TYPE_EXTENDED_IRQ,
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ACPI_RS_SIZE(struct acpi_resource_extended_irq),
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ACPI_RSC_TABLE_SIZE(acpi_rs_convert_ext_irq)},
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{ACPI_RSC_INITSET, ACPI_RESOURCE_NAME_EXTENDED_IRQ,
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sizeof(struct aml_resource_extended_irq),
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0},
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/*
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* Flags: Producer/Consumer[0], Triggering[1], Polarity[2],
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* Sharing[3], Wake[4]
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*/
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{ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.extended_irq.producer_consumer),
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AML_OFFSET(extended_irq.flags),
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0},
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{ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.extended_irq.triggering),
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AML_OFFSET(extended_irq.flags),
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1},
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{ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.extended_irq.polarity),
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AML_OFFSET(extended_irq.flags),
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2},
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{ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.extended_irq.sharable),
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AML_OFFSET(extended_irq.flags),
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3},
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{ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.extended_irq.wake_capable),
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AML_OFFSET(extended_irq.flags),
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4},
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/* IRQ Table length (Byte4) */
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{ACPI_RSC_COUNT, ACPI_RS_OFFSET(data.extended_irq.interrupt_count),
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AML_OFFSET(extended_irq.interrupt_count),
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sizeof(u32)},
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/* Copy every IRQ in the table, each is 32 bits */
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{ACPI_RSC_MOVE32, ACPI_RS_OFFSET(data.extended_irq.interrupts[0]),
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AML_OFFSET(extended_irq.interrupts[0]),
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0},
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/* Optional resource_source (Index and String) */
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{ACPI_RSC_SOURCEX, ACPI_RS_OFFSET(data.extended_irq.resource_source),
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ACPI_RS_OFFSET(data.extended_irq.interrupts[0]),
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sizeof(struct aml_resource_extended_irq)}
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};
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/*******************************************************************************
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*
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* acpi_rs_convert_dma
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*
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******************************************************************************/
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struct acpi_rsconvert_info acpi_rs_convert_dma[6] = {
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{ACPI_RSC_INITGET, ACPI_RESOURCE_TYPE_DMA,
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ACPI_RS_SIZE(struct acpi_resource_dma),
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ACPI_RSC_TABLE_SIZE(acpi_rs_convert_dma)},
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{ACPI_RSC_INITSET, ACPI_RESOURCE_NAME_DMA,
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sizeof(struct aml_resource_dma),
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0},
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/* Flags: transfer preference, bus mastering, channel speed */
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{ACPI_RSC_2BITFLAG, ACPI_RS_OFFSET(data.dma.transfer),
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AML_OFFSET(dma.flags),
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0},
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{ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.dma.bus_master),
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AML_OFFSET(dma.flags),
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2},
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{ACPI_RSC_2BITFLAG, ACPI_RS_OFFSET(data.dma.type),
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AML_OFFSET(dma.flags),
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5},
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/* DMA channel mask bits */
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{ACPI_RSC_BITMASK, ACPI_RS_OFFSET(data.dma.channels[0]),
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AML_OFFSET(dma.dma_channel_mask),
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ACPI_RS_OFFSET(data.dma.channel_count)}
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};
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/*******************************************************************************
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*
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* acpi_rs_convert_fixed_dma
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*
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******************************************************************************/
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struct acpi_rsconvert_info acpi_rs_convert_fixed_dma[4] = {
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{ACPI_RSC_INITGET, ACPI_RESOURCE_TYPE_FIXED_DMA,
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ACPI_RS_SIZE(struct acpi_resource_fixed_dma),
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ACPI_RSC_TABLE_SIZE(acpi_rs_convert_fixed_dma)},
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{ACPI_RSC_INITSET, ACPI_RESOURCE_NAME_FIXED_DMA,
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sizeof(struct aml_resource_fixed_dma),
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0},
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/*
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* These fields are contiguous in both the source and destination:
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* request_lines
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* Channels
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*/
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{ACPI_RSC_MOVE16, ACPI_RS_OFFSET(data.fixed_dma.request_lines),
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AML_OFFSET(fixed_dma.request_lines),
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2},
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{ACPI_RSC_MOVE8, ACPI_RS_OFFSET(data.fixed_dma.width),
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AML_OFFSET(fixed_dma.width),
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1},
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};
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