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linux-next/drivers/gpu/drm/i915
Ville Syrjälä 9cdb826c14 drm/i915: Change i915_request power well handling
Reorganize the internal i915_request power well handling to use the
reference count just like everyone else. This way all we need to do is
check the reference count and we know whether the power well needs to be
enabled of disabled.

v2: Split he intel_display_power_{get,put} change to another patch.
    Add intel_resume_power_well() to make sure we enable the power
    well on resume

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-09-20 23:48:44 +02:00
..
dvo_ch7xxx.c drm/i915: dvo_ch7xxx: fix vsync polarity setting 2013-07-25 16:10:22 +02:00
dvo_ch7017.c drm/i915/dvo: implement get_hw_state 2012-09-06 07:58:52 +02:00
dvo_ivch.c drm/i915/dvo: implement get_hw_state 2012-09-06 07:58:52 +02:00
dvo_ns2501.c drm/i915/dvo: implement get_hw_state 2012-09-06 07:58:52 +02:00
dvo_sil164.c drm/i915/dvo: implement get_hw_state 2012-09-06 07:58:52 +02:00
dvo_tfp410.c drm/i915/dvo: implement get_hw_state 2012-09-06 07:58:52 +02:00
dvo.h drm/i915: Remove unused mode_fixup() vfunc of struct intel_dvo_dev_ops 2013-09-05 21:39:59 +02:00
i915_debugfs.c drm/i915: Do remaps for all contexts 2013-09-19 20:39:56 +02:00
i915_dma.c drm/i915: Write RING_TAIL once per-request 2013-09-10 15:35:58 +02:00
i915_drv.c drm/i915: move more code to __i915_drm_thaw 2013-09-13 11:40:19 +02:00
i915_drv.h drm/i915: s/HAS_L3_GPU_CACHE/HAS_L3_DPF 2013-09-19 20:41:00 +02:00
i915_gem_context.c drm/i915: Do remaps for all contexts 2013-09-19 20:39:56 +02:00
i915_gem_debug.c drm/i915: Fix #endif comment 2013-08-09 10:45:52 +02:00
i915_gem_dmabuf.c drm/i915: Pin pages whilst mapping the dma-buf 2013-09-03 19:17:58 +02:00
i915_gem_evict.c drm/i915: evict VM instead of everything 2013-09-12 21:58:22 +02:00
i915_gem_execbuffer.c drm/i915: evict VM instead of everything 2013-09-12 21:58:22 +02:00
i915_gem_gtt.c drm/i915: Use Write-Through cacheing for the display plane on Iris 2013-08-22 13:31:38 +02:00
i915_gem_stolen.c drm/i915: inline vma_create into lookup_or_create_vma 2013-09-04 17:34:41 +02:00
i915_gem_tiling.c drm/i915: plumb VM into bind/unbind code 2013-08-08 14:04:20 +02:00
i915_gem.c drm/i915: s/HAS_L3_GPU_CACHE/HAS_L3_DPF 2013-09-19 20:41:00 +02:00
i915_gpu_error.c drm/i915: include hangcheck action and score in error_state 2013-09-06 17:56:17 +02:00
i915_ioc32.c UAPI: (Scripted) Convert #include "..." to #include <path/...> in drivers/gpu/ 2012-10-02 18:01:07 +01:00
i915_irq.c drm/i915: don't disable ERR_INT on the IRQ handler 2013-09-20 10:08:15 +02:00
i915_reg.h drm/i915: Add second slice l3 remapping 2013-09-19 20:37:04 +02:00
i915_suspend.c drm/i915: don't save/restore LBB on Gen5+ 2013-09-13 11:40:45 +02:00
i915_sysfs.c drm/i915/vlv: disable rc6p and rc6pp residency reporting on BYT 2013-09-20 09:43:03 +02:00
i915_trace_points.c drm/i915: [sparse] trivial sparse fixes 2012-04-18 10:34:49 +02:00
i915_trace.h drm/i915: plumb VM into bind/unbind code 2013-08-08 14:04:20 +02:00
i915_ums.c drm/i915: scrap register address storage 2013-06-10 19:54:14 +02:00
intel_acpi.c i915: fix ACPI _DSM warning 2013-08-05 19:04:05 +02:00
intel_bios.c drm/i915: Parse the MIPI related VBT Block and store relevant info 2013-09-04 17:34:50 +02:00
intel_bios.h drm/i915: Parse the MIPI related VBT Block and store relevant info 2013-09-04 17:34:50 +02:00
intel_crt.c drm/i915: Fix port_clock and adjusted_mode.clock readout all over 2013-09-16 22:59:38 +02:00
intel_ddi.c drm/i915: Add state readout and checking for has_dp_encoder and dp_m_n 2013-09-13 14:53:21 +02:00
intel_display.c drm/i915: POSTING_READ IPS_CTL before waiting for the vblank 2013-09-20 10:19:01 +02:00
intel_dp.c drm/i915: WARN is the DP aux read or write is too big 2013-09-17 17:22:44 +02:00
intel_drv.h drm/i915: Change i915_request power well handling 2013-09-20 23:48:44 +02:00
intel_dsi_cmd.c drm/i915/dsi: s/size_t/int/ 2013-09-04 17:34:51 +02:00
intel_dsi_cmd.h drm/i915/dsi: s/size_t/int/ 2013-09-04 17:34:51 +02:00
intel_dsi_pll.c drm/i915: Use adjusted_mode in DSI PLL calculations 2013-09-16 23:36:38 +02:00
intel_dsi.c drm/i915: Band Gap WA 2013-09-04 17:34:49 +02:00
intel_dsi.h drm/i915: add VLV DSI PLL Calculations 2013-09-04 17:34:48 +02:00
intel_dvo.c drm/i915: Fix port_clock and adjusted_mode.clock readout all over 2013-09-16 22:59:38 +02:00
intel_fb.c drm/i915: Export intel_framebuffer_fini 2013-08-06 20:08:50 +02:00
intel_hdmi.c drm/i915: Use adjusted_mode in HDMI 12bpc clock check 2013-09-16 23:22:10 +02:00
intel_i2c.c drm/i915: allow package C8+ states on Haswell (disabled) 2013-08-23 14:52:33 +02:00
intel_lvds.c drm/i915: Fix port_clock and adjusted_mode.clock readout all over 2013-09-16 22:59:38 +02:00
intel_modes.c drm/i915: Add "Automatic" mode for the "Broadcast RGB" property 2013-01-20 13:09:44 +01:00
intel_opregion.c drm/i915: check for more ASLC interrupts 2013-09-17 18:07:45 +02:00
intel_overlay.c drm/i915: Convert overlay double wide check over to pipe config 2013-09-17 10:06:24 +02:00
intel_panel.c drm/i915: register backlight device also when backlight class is a module 2013-09-19 14:39:53 +02:00
intel_pm.c drm/i915: Change i915_request power well handling 2013-09-20 23:48:44 +02:00
intel_ringbuffer.c drm/i915: s/HAS_L3_GPU_CACHE/HAS_L3_DPF 2013-09-19 20:41:00 +02:00
intel_ringbuffer.h drm/i915: Write RING_TAIL once per-request 2013-09-10 15:35:58 +02:00
intel_sdvo_regs.h drm/i915: clear the entire sdvo infoframe buffer 2012-10-24 15:12:48 +02:00
intel_sdvo.c drm/i915: Fix port_clock and adjusted_mode.clock readout all over 2013-09-16 22:59:38 +02:00
intel_sideband.c drm/i915: Add additional pipe parameter for vlv_dpio_read and vlv_dpio_write. v2 2013-09-05 15:04:36 +02:00
intel_sprite.c drm/i915: Add explicit pipe src size to pipe config 2013-09-16 23:36:49 +02:00
intel_tv.c drm/i915/tv: Use native encoder->mode_set callback 2013-08-04 21:25:22 +02:00
intel_uncore.c drm/i915: sanitize forcewake registers on reset 2013-09-03 11:10:54 +02:00
Makefile drm/i915: add VLV DSI PLL Calculations 2013-09-04 17:34:48 +02:00