mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-23 12:43:55 +08:00
f11d59d87b
All devices using a triggered buffer need to attach and detach the trigger to the device in order to properly work. Instead of doing this in each and every driver by hand move this into the core. At this point in time, all drivers should have been resolved to attach/detach the poll-function in the same order. This patch removes all explicit calls of iio_triggered_buffer_postenable() & iio_triggered_buffer_predisable() in all drivers, since the core handles now the pollfunc attach/detach. The more peculiar change is for the 'at91-sama5d2_adc' driver, since it's not immediately obvious that removing the hooks doesn't break anything. Eugen was able to test on at91-sama5d2-adc driver, sama5d2-xplained board. All seems to be fine. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com> Tested-by: Eugen Hristev <eugen.hristev@microchip.com> #for at91-sama5d2-adc Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
514 lines
13 KiB
C
514 lines
13 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* AD7266/65 SPI ADC driver
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*
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* Copyright 2012 Analog Devices Inc.
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*/
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#include <linux/device.h>
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include <linux/spi/spi.h>
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#include <linux/regulator/consumer.h>
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#include <linux/err.h>
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#include <linux/gpio/consumer.h>
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/buffer.h>
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#include <linux/iio/trigger_consumer.h>
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#include <linux/iio/triggered_buffer.h>
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#include <linux/platform_data/ad7266.h>
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struct ad7266_state {
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struct spi_device *spi;
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struct regulator *reg;
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unsigned long vref_mv;
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struct spi_transfer single_xfer[3];
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struct spi_message single_msg;
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enum ad7266_range range;
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enum ad7266_mode mode;
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bool fixed_addr;
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struct gpio_desc *gpios[3];
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/*
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* DMA (thus cache coherency maintenance) requires the
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* transfer buffers to live in their own cache lines.
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* The buffer needs to be large enough to hold two samples (4 bytes) and
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* the naturally aligned timestamp (8 bytes).
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*/
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struct {
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__be16 sample[2];
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s64 timestamp;
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} data ____cacheline_aligned;
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};
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static int ad7266_wakeup(struct ad7266_state *st)
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{
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/* Any read with >= 2 bytes will wake the device */
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return spi_read(st->spi, &st->data.sample[0], 2);
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}
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static int ad7266_powerdown(struct ad7266_state *st)
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{
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/* Any read with < 2 bytes will powerdown the device */
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return spi_read(st->spi, &st->data.sample[0], 1);
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}
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static int ad7266_preenable(struct iio_dev *indio_dev)
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{
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struct ad7266_state *st = iio_priv(indio_dev);
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return ad7266_wakeup(st);
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}
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static int ad7266_postdisable(struct iio_dev *indio_dev)
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{
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struct ad7266_state *st = iio_priv(indio_dev);
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return ad7266_powerdown(st);
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}
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static const struct iio_buffer_setup_ops iio_triggered_buffer_setup_ops = {
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.preenable = &ad7266_preenable,
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.postdisable = &ad7266_postdisable,
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};
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static irqreturn_t ad7266_trigger_handler(int irq, void *p)
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{
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struct iio_poll_func *pf = p;
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struct iio_dev *indio_dev = pf->indio_dev;
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struct ad7266_state *st = iio_priv(indio_dev);
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int ret;
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ret = spi_read(st->spi, st->data.sample, 4);
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if (ret == 0) {
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iio_push_to_buffers_with_timestamp(indio_dev, &st->data,
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pf->timestamp);
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}
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iio_trigger_notify_done(indio_dev->trig);
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return IRQ_HANDLED;
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}
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static void ad7266_select_input(struct ad7266_state *st, unsigned int nr)
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{
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unsigned int i;
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if (st->fixed_addr)
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return;
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switch (st->mode) {
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case AD7266_MODE_SINGLE_ENDED:
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nr >>= 1;
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break;
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case AD7266_MODE_PSEUDO_DIFF:
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nr |= 1;
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break;
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case AD7266_MODE_DIFF:
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nr &= ~1;
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break;
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}
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for (i = 0; i < 3; ++i)
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gpiod_set_value(st->gpios[i], (bool)(nr & BIT(i)));
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}
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static int ad7266_update_scan_mode(struct iio_dev *indio_dev,
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const unsigned long *scan_mask)
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{
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struct ad7266_state *st = iio_priv(indio_dev);
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unsigned int nr = find_first_bit(scan_mask, indio_dev->masklength);
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ad7266_select_input(st, nr);
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return 0;
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}
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static int ad7266_read_single(struct ad7266_state *st, int *val,
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unsigned int address)
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{
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int ret;
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ad7266_select_input(st, address);
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ret = spi_sync(st->spi, &st->single_msg);
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*val = be16_to_cpu(st->data.sample[address % 2]);
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return ret;
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}
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static int ad7266_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan, int *val, int *val2, long m)
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{
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struct ad7266_state *st = iio_priv(indio_dev);
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unsigned long scale_mv;
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int ret;
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switch (m) {
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case IIO_CHAN_INFO_RAW:
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ret = iio_device_claim_direct_mode(indio_dev);
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if (ret)
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return ret;
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ret = ad7266_read_single(st, val, chan->address);
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iio_device_release_direct_mode(indio_dev);
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*val = (*val >> 2) & 0xfff;
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if (chan->scan_type.sign == 's')
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*val = sign_extend32(*val, 11);
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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scale_mv = st->vref_mv;
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if (st->mode == AD7266_MODE_DIFF)
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scale_mv *= 2;
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if (st->range == AD7266_RANGE_2VREF)
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scale_mv *= 2;
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*val = scale_mv;
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*val2 = chan->scan_type.realbits;
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return IIO_VAL_FRACTIONAL_LOG2;
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case IIO_CHAN_INFO_OFFSET:
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if (st->range == AD7266_RANGE_2VREF &&
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st->mode != AD7266_MODE_DIFF)
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*val = 2048;
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else
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*val = 0;
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return IIO_VAL_INT;
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}
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return -EINVAL;
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}
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#define AD7266_CHAN(_chan, _sign) { \
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.type = IIO_VOLTAGE, \
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.indexed = 1, \
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.channel = (_chan), \
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.address = (_chan), \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
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.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
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| BIT(IIO_CHAN_INFO_OFFSET), \
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.scan_index = (_chan), \
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.scan_type = { \
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.sign = (_sign), \
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.realbits = 12, \
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.storagebits = 16, \
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.shift = 2, \
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.endianness = IIO_BE, \
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}, \
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}
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#define AD7266_DECLARE_SINGLE_ENDED_CHANNELS(_name, _sign) \
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const struct iio_chan_spec ad7266_channels_##_name[] = { \
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AD7266_CHAN(0, (_sign)), \
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AD7266_CHAN(1, (_sign)), \
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AD7266_CHAN(2, (_sign)), \
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AD7266_CHAN(3, (_sign)), \
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AD7266_CHAN(4, (_sign)), \
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AD7266_CHAN(5, (_sign)), \
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AD7266_CHAN(6, (_sign)), \
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AD7266_CHAN(7, (_sign)), \
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AD7266_CHAN(8, (_sign)), \
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AD7266_CHAN(9, (_sign)), \
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AD7266_CHAN(10, (_sign)), \
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AD7266_CHAN(11, (_sign)), \
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IIO_CHAN_SOFT_TIMESTAMP(13), \
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}
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#define AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(_name, _sign) \
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const struct iio_chan_spec ad7266_channels_##_name##_fixed[] = { \
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AD7266_CHAN(0, (_sign)), \
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AD7266_CHAN(1, (_sign)), \
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IIO_CHAN_SOFT_TIMESTAMP(2), \
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}
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static AD7266_DECLARE_SINGLE_ENDED_CHANNELS(u, 'u');
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static AD7266_DECLARE_SINGLE_ENDED_CHANNELS(s, 's');
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static AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(u, 'u');
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static AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(s, 's');
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#define AD7266_CHAN_DIFF(_chan, _sign) { \
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.type = IIO_VOLTAGE, \
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.indexed = 1, \
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.channel = (_chan) * 2, \
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.channel2 = (_chan) * 2 + 1, \
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.address = (_chan), \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
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.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
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| BIT(IIO_CHAN_INFO_OFFSET), \
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.scan_index = (_chan), \
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.scan_type = { \
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.sign = _sign, \
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.realbits = 12, \
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.storagebits = 16, \
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.shift = 2, \
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.endianness = IIO_BE, \
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}, \
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.differential = 1, \
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}
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#define AD7266_DECLARE_DIFF_CHANNELS(_name, _sign) \
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const struct iio_chan_spec ad7266_channels_diff_##_name[] = { \
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AD7266_CHAN_DIFF(0, (_sign)), \
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AD7266_CHAN_DIFF(1, (_sign)), \
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AD7266_CHAN_DIFF(2, (_sign)), \
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AD7266_CHAN_DIFF(3, (_sign)), \
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AD7266_CHAN_DIFF(4, (_sign)), \
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AD7266_CHAN_DIFF(5, (_sign)), \
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IIO_CHAN_SOFT_TIMESTAMP(6), \
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}
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static AD7266_DECLARE_DIFF_CHANNELS(s, 's');
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static AD7266_DECLARE_DIFF_CHANNELS(u, 'u');
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#define AD7266_DECLARE_DIFF_CHANNELS_FIXED(_name, _sign) \
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const struct iio_chan_spec ad7266_channels_diff_fixed_##_name[] = { \
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AD7266_CHAN_DIFF(0, (_sign)), \
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AD7266_CHAN_DIFF(1, (_sign)), \
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IIO_CHAN_SOFT_TIMESTAMP(2), \
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}
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static AD7266_DECLARE_DIFF_CHANNELS_FIXED(s, 's');
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static AD7266_DECLARE_DIFF_CHANNELS_FIXED(u, 'u');
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static const struct iio_info ad7266_info = {
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.read_raw = &ad7266_read_raw,
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.update_scan_mode = &ad7266_update_scan_mode,
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};
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static const unsigned long ad7266_available_scan_masks[] = {
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0x003,
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0x00c,
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0x030,
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0x0c0,
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0x300,
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0xc00,
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0x000,
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};
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static const unsigned long ad7266_available_scan_masks_diff[] = {
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0x003,
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0x00c,
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0x030,
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0x000,
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};
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static const unsigned long ad7266_available_scan_masks_fixed[] = {
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0x003,
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0x000,
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};
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struct ad7266_chan_info {
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const struct iio_chan_spec *channels;
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unsigned int num_channels;
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const unsigned long *scan_masks;
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};
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#define AD7266_CHAN_INFO_INDEX(_differential, _signed, _fixed) \
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(((_differential) << 2) | ((_signed) << 1) | ((_fixed) << 0))
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static const struct ad7266_chan_info ad7266_chan_infos[] = {
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[AD7266_CHAN_INFO_INDEX(0, 0, 0)] = {
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.channels = ad7266_channels_u,
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.num_channels = ARRAY_SIZE(ad7266_channels_u),
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.scan_masks = ad7266_available_scan_masks,
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},
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[AD7266_CHAN_INFO_INDEX(0, 0, 1)] = {
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.channels = ad7266_channels_u_fixed,
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.num_channels = ARRAY_SIZE(ad7266_channels_u_fixed),
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.scan_masks = ad7266_available_scan_masks_fixed,
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},
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[AD7266_CHAN_INFO_INDEX(0, 1, 0)] = {
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.channels = ad7266_channels_s,
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.num_channels = ARRAY_SIZE(ad7266_channels_s),
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.scan_masks = ad7266_available_scan_masks,
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},
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[AD7266_CHAN_INFO_INDEX(0, 1, 1)] = {
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.channels = ad7266_channels_s_fixed,
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.num_channels = ARRAY_SIZE(ad7266_channels_s_fixed),
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.scan_masks = ad7266_available_scan_masks_fixed,
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},
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[AD7266_CHAN_INFO_INDEX(1, 0, 0)] = {
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.channels = ad7266_channels_diff_u,
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.num_channels = ARRAY_SIZE(ad7266_channels_diff_u),
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.scan_masks = ad7266_available_scan_masks_diff,
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},
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[AD7266_CHAN_INFO_INDEX(1, 0, 1)] = {
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.channels = ad7266_channels_diff_fixed_u,
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.num_channels = ARRAY_SIZE(ad7266_channels_diff_fixed_u),
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.scan_masks = ad7266_available_scan_masks_fixed,
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},
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[AD7266_CHAN_INFO_INDEX(1, 1, 0)] = {
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.channels = ad7266_channels_diff_s,
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.num_channels = ARRAY_SIZE(ad7266_channels_diff_s),
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.scan_masks = ad7266_available_scan_masks_diff,
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},
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[AD7266_CHAN_INFO_INDEX(1, 1, 1)] = {
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.channels = ad7266_channels_diff_fixed_s,
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.num_channels = ARRAY_SIZE(ad7266_channels_diff_fixed_s),
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.scan_masks = ad7266_available_scan_masks_fixed,
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},
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};
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static void ad7266_init_channels(struct iio_dev *indio_dev)
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{
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struct ad7266_state *st = iio_priv(indio_dev);
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bool is_differential, is_signed;
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const struct ad7266_chan_info *chan_info;
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int i;
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is_differential = st->mode != AD7266_MODE_SINGLE_ENDED;
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is_signed = (st->range == AD7266_RANGE_2VREF) |
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(st->mode == AD7266_MODE_DIFF);
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i = AD7266_CHAN_INFO_INDEX(is_differential, is_signed, st->fixed_addr);
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chan_info = &ad7266_chan_infos[i];
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indio_dev->channels = chan_info->channels;
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indio_dev->num_channels = chan_info->num_channels;
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indio_dev->available_scan_masks = chan_info->scan_masks;
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indio_dev->masklength = chan_info->num_channels - 1;
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}
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static const char * const ad7266_gpio_labels[] = {
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"ad0", "ad1", "ad2",
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};
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static int ad7266_probe(struct spi_device *spi)
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{
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struct ad7266_platform_data *pdata = spi->dev.platform_data;
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struct iio_dev *indio_dev;
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struct ad7266_state *st;
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unsigned int i;
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int ret;
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indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
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if (indio_dev == NULL)
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return -ENOMEM;
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st = iio_priv(indio_dev);
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st->reg = devm_regulator_get_optional(&spi->dev, "vref");
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if (!IS_ERR(st->reg)) {
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ret = regulator_enable(st->reg);
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if (ret)
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return ret;
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ret = regulator_get_voltage(st->reg);
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if (ret < 0)
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goto error_disable_reg;
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st->vref_mv = ret / 1000;
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} else {
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/* Any other error indicates that the regulator does exist */
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if (PTR_ERR(st->reg) != -ENODEV)
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return PTR_ERR(st->reg);
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/* Use internal reference */
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st->vref_mv = 2500;
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}
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if (pdata) {
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st->fixed_addr = pdata->fixed_addr;
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st->mode = pdata->mode;
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st->range = pdata->range;
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if (!st->fixed_addr) {
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for (i = 0; i < ARRAY_SIZE(st->gpios); ++i) {
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st->gpios[i] = devm_gpiod_get(&spi->dev,
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ad7266_gpio_labels[i],
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GPIOD_OUT_LOW);
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if (IS_ERR(st->gpios[i])) {
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ret = PTR_ERR(st->gpios[i]);
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goto error_disable_reg;
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}
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}
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}
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} else {
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st->fixed_addr = true;
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st->range = AD7266_RANGE_VREF;
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st->mode = AD7266_MODE_DIFF;
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}
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spi_set_drvdata(spi, indio_dev);
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st->spi = spi;
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indio_dev->name = spi_get_device_id(spi)->name;
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indio_dev->modes = INDIO_DIRECT_MODE;
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indio_dev->info = &ad7266_info;
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ad7266_init_channels(indio_dev);
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/* wakeup */
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st->single_xfer[0].rx_buf = &st->data.sample[0];
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st->single_xfer[0].len = 2;
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st->single_xfer[0].cs_change = 1;
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/* conversion */
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st->single_xfer[1].rx_buf = st->data.sample;
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st->single_xfer[1].len = 4;
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st->single_xfer[1].cs_change = 1;
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/* powerdown */
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st->single_xfer[2].tx_buf = &st->data.sample[0];
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st->single_xfer[2].len = 1;
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spi_message_init(&st->single_msg);
|
|
spi_message_add_tail(&st->single_xfer[0], &st->single_msg);
|
|
spi_message_add_tail(&st->single_xfer[1], &st->single_msg);
|
|
spi_message_add_tail(&st->single_xfer[2], &st->single_msg);
|
|
|
|
ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
|
|
&ad7266_trigger_handler, &iio_triggered_buffer_setup_ops);
|
|
if (ret)
|
|
goto error_disable_reg;
|
|
|
|
ret = iio_device_register(indio_dev);
|
|
if (ret)
|
|
goto error_buffer_cleanup;
|
|
|
|
return 0;
|
|
|
|
error_buffer_cleanup:
|
|
iio_triggered_buffer_cleanup(indio_dev);
|
|
error_disable_reg:
|
|
if (!IS_ERR(st->reg))
|
|
regulator_disable(st->reg);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int ad7266_remove(struct spi_device *spi)
|
|
{
|
|
struct iio_dev *indio_dev = spi_get_drvdata(spi);
|
|
struct ad7266_state *st = iio_priv(indio_dev);
|
|
|
|
iio_device_unregister(indio_dev);
|
|
iio_triggered_buffer_cleanup(indio_dev);
|
|
if (!IS_ERR(st->reg))
|
|
regulator_disable(st->reg);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct spi_device_id ad7266_id[] = {
|
|
{"ad7265", 0},
|
|
{"ad7266", 0},
|
|
{ }
|
|
};
|
|
MODULE_DEVICE_TABLE(spi, ad7266_id);
|
|
|
|
static struct spi_driver ad7266_driver = {
|
|
.driver = {
|
|
.name = "ad7266",
|
|
},
|
|
.probe = ad7266_probe,
|
|
.remove = ad7266_remove,
|
|
.id_table = ad7266_id,
|
|
};
|
|
module_spi_driver(ad7266_driver);
|
|
|
|
MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
|
|
MODULE_DESCRIPTION("Analog Devices AD7266/65 ADC");
|
|
MODULE_LICENSE("GPL v2");
|