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7affe5685c
Add the driver for the clock gate control which uses PSC (Power Sleep Controller) IP on Keystone 2 based SOCs. It is responsible for enabling and disabling of the clocks for different IPs present in the SoC. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
30 lines
955 B
Plaintext
30 lines
955 B
Plaintext
Status: Unstable - ABI compatibility may be broken in the future
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Binding for Keystone gate control driver which uses PSC controller IP.
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This binding uses the common clock binding[1].
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[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
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Required properties:
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- compatible : shall be "ti,keystone,psc-clock".
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- #clock-cells : from common clock binding; shall be set to 0.
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- clocks : parent clock phandle
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- reg : psc control and domain address address space
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- reg-names : psc control and domain registers
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- domain-id : psc domain id needed to check the transition state register
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Optional properties:
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- clock-output-names : From common clock binding to override the
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default output clock name
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Example:
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clkusb: clkusb {
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#clock-cells = <0>;
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compatible = "ti,keystone,psc-clock";
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clocks = <&chipclk16>;
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clock-output-names = "usb";
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reg = <0x02350008 0xb00>, <0x02350000 0x400>;
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reg-names = "control", "domain";
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domain-id = <0>;
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};
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