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301c5d2940
the hardware node includes both clock and reset support, so it is named as "car". this patch implements Flexible clocks(mux, divider, gate), Selectable clock(mux, divider, gate), root clock(gate),leaf clock(gate), others. it also implements the reset controller functionality. Signed-off-by: Zhiwu Song <Zhiwu.Song@csr.com> Signed-off-by: Guo Zeng <Guo.Zeng@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
56 lines
1.3 KiB
Plaintext
56 lines
1.3 KiB
Plaintext
* Clock and reset bindings for CSR atlas7
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Required properties:
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- compatible: Should be "sirf,atlas7-car"
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- reg: Address and length of the register set
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- #clock-cells: Should be <1>
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- #reset-cells: Should be <1>
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The clock consumer should specify the desired clock by having the clock
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ID in its "clocks" phandle cell.
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The ID list atlas7_clks defined in drivers/clk/sirf/clk-atlas7.c
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The reset consumer should specify the desired reset by having the reset
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ID in its "reset" phandle cell.
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The ID list atlas7_reset_unit defined in drivers/clk/sirf/clk-atlas7.c
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Examples: Clock and reset controller node:
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car: clock-controller@18620000 {
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compatible = "sirf,atlas7-car";
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reg = <0x18620000 0x1000>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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Examples: Consumers using clock or reset:
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timer@10dc0000 {
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compatible = "sirf,macro-tick";
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reg = <0x10dc0000 0x1000>;
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clocks = <&car 54>;
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interrupts = <0 0 0>,
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<0 1 0>,
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<0 2 0>,
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<0 49 0>,
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<0 50 0>,
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<0 51 0>;
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};
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uart1: uart@18020000 {
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cell-index = <1>;
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compatible = "sirf,macro-uart";
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reg = <0x18020000 0x1000>;
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clocks = <&clks 95>;
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interrupts = <0 18 0>;
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fifosize = <32>;
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};
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vpp@13110000 {
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compatible = "sirf,prima2-vpp";
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reg = <0x13110000 0x10000>;
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interrupts = <0 31 0>;
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clocks = <&car 85>;
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resets = <&car 29>;
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};
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