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8bc4d5f394
First cycle with Boris as NAND maintainer! Many (most) bullets stolen from him.
Generic:
* Migrated NAND LED trigger to be a generic MTD trigger
NAND:
* Introduction of the "ECC algorithm" concept, to avoid overloading the ECC
mode field too much more
* Replaced the nand_ecclayout infrastructure with something a little more
flexible (finally!) and future proof
* Rework of the OMAP GPMC and NAND drivers; the TI folks pulled some of
this into their own tree as well
* Prepare the sunxi NAND driver to receive DMA support
* Handle bitflips in erased pages on GPMI revisions that do not support
this in hardware.
SPI NOR:
* Start using the spi_flash_read() API for SPI drivers that support it (i.e.,
SPI drivers with special memory-mapped flash modes)
And other small scattered improvments.
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Merge tag 'for-linus-20160523' of git://git.infradead.org/linux-mtd
Pull MTD updates from Brian Norris:
"First cycle with Boris as NAND maintainer! Many (most) bullets stolen
from him.
Generic:
- Migrated NAND LED trigger to be a generic MTD trigger
NAND:
- Introduction of the "ECC algorithm" concept, to avoid overloading
the ECC mode field too much more
- Replaced the nand_ecclayout infrastructure with something a little
more flexible (finally!) and future proof
- Rework of the OMAP GPMC and NAND drivers; the TI folks pulled some
of this into their own tree as well
- Prepare the sunxi NAND driver to receive DMA support
- Handle bitflips in erased pages on GPMI revisions that do not
support this in hardware.
SPI NOR:
- Start using the spi_flash_read() API for SPI drivers that support
it (i.e., SPI drivers with special memory-mapped flash modes)
And other small scattered improvments"
* tag 'for-linus-20160523' of git://git.infradead.org/linux-mtd: (155 commits)
mtd: spi-nor: support GigaDevice gd25lq64c
mtd: nand_bch: fix spelling of "probably"
mtd: brcmnand: respect ECC algorithm set by NAND subsystem
gpmi-nand: Handle ECC Errors in erased pages
Documentation: devicetree: deprecate "soft_bch" nand-ecc-mode value
mtd: nand: add support for "nand-ecc-algo" DT property
mtd: mtd: drop NAND_ECC_SOFT_BCH enum value
mtd: drop support for NAND_ECC_SOFT_BCH as "soft_bch" mapping
mtd: nand: read ECC algorithm from the new field
mtd: nand: fsmc: validate ECC setup by checking algorithm directly
mtd: nand: set ECC algorithm to Hamming on fallback
staging: mt29f_spinand: set ECC algorithm explicitly
CRIS v32: nand: set ECC algorithm explicitly
mtd: nand: atmel: set ECC algorithm explicitly
mtd: nand: davinci: set ECC algorithm explicitly
mtd: nand: bf5xx: set ECC algorithm explicitly
mtd: nand: omap2: Fix high memory dma prefetch transfer
mtd: nand: omap2: Start dma request before enabling prefetch
mtd: nandsim: add __init attribute
mtd: nand: move of_get_nand_xxx() helpers into nand_base.c
...
|
||
|---|---|---|
| .. | ||
| bcma_private.h | ||
| core.c | ||
| driver_chipcommon_b.c | ||
| driver_chipcommon_nflash.c | ||
| driver_chipcommon_pflash.c | ||
| driver_chipcommon_pmu.c | ||
| driver_chipcommon_sflash.c | ||
| driver_chipcommon.c | ||
| driver_gmac_cmn.c | ||
| driver_gpio.c | ||
| driver_mips.c | ||
| driver_pci_host.c | ||
| driver_pci.c | ||
| driver_pcie2.c | ||
| host_pci.c | ||
| host_soc.c | ||
| Kconfig | ||
| main.c | ||
| Makefile | ||
| README | ||
| scan.c | ||
| scan.h | ||
| sprom.c | ||
| TODO | ||
Broadcom introduced new bus as replacement for older SSB. It is based on AMBA, however from programming point of view there is nothing AMBA specific we use. Standard AMBA drivers are platform specific, have hardcoded addresses and use AMBA standard fields like CID and PID. In case of Broadcom's cards every device consists of: 1) Broadcom specific AMBA device. It is put on AMBA bus, but can not be treated as standard AMBA device. Reading it's CID or PID can cause machine lockup. 2) AMBA standard devices called ports or wrappers. They have CIDs (AMBA_CID) and PIDs (0x103BB369), but we do not use that info for anything. One of that devices is used for managing Broadcom specific core. Addresses of AMBA devices are not hardcoded in driver and have to be read from EPROM. In this situation we decided to introduce separated bus. It can contain up to 16 devices identified by Broadcom specific fields: manufacturer, id, revision and class.