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9a5e6c7eb5
The PLLs on newer Allwinner SoC's, such as the A31 and A23, have a N multiplier factor that starts from 1, not 0. This patch adds an option to the factor clk driver's config data structures to specify the base value of N. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
31 lines
558 B
C
31 lines
558 B
C
#ifndef __MACH_SUNXI_CLK_FACTORS_H
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#define __MACH_SUNXI_CLK_FACTORS_H
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#include <linux/clk-provider.h>
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#include <linux/clkdev.h>
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#define SUNXI_FACTORS_NOT_APPLICABLE (0)
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struct clk_factors_config {
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u8 nshift;
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u8 nwidth;
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u8 kshift;
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u8 kwidth;
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u8 mshift;
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u8 mwidth;
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u8 pshift;
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u8 pwidth;
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u8 n_start;
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};
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struct clk_factors {
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struct clk_hw hw;
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void __iomem *reg;
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struct clk_factors_config *config;
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void (*get_factors) (u32 *rate, u32 parent, u8 *n, u8 *k, u8 *m, u8 *p);
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spinlock_t *lock;
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};
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extern const struct clk_ops clk_factors_ops;
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#endif
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