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Signed-off-by: Martin Fuzzey <mfuzzey@parkeon.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Evgeniy Polyakov <zbr@ioremap.net> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
20 lines
488 B
Plaintext
20 lines
488 B
Plaintext
* Freescale i.MX One wire bus master controller
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Required properties:
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- compatible : should be "fsl,imx21-owire"
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- reg : Address and length of the register set for the device
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Optional properties:
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- clocks : phandle of clock that supplies the module (required if platform
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clock bindings use device tree)
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Example:
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- From imx53.dtsi:
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owire: owire@63fa4000 {
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compatible = "fsl,imx53-owire", "fsl,imx21-owire";
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reg = <0x63fa4000 0x4000>;
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clocks = <&clks 159>;
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status = "disabled";
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};
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