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https://github.com/edk2-porting/linux-next.git
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c7db4ff5d2
Add macros to enable and disable to manage PSTATE.D for debugging. The macros local_dbg_save and local_dbg_restore are moved to irqflags.h file KGDB boot tests fail because of PSTATE.D is masked. unmask it for debugging support Signed-off-by: Vijaya Kumar K <Vijaya.Kumar@caviumnetworks.com> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
118 lines
2.6 KiB
C
118 lines
2.6 KiB
C
/*
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* Copyright (C) 2012 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __ASM_IRQFLAGS_H
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#define __ASM_IRQFLAGS_H
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#ifdef __KERNEL__
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#include <asm/ptrace.h>
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/*
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* CPU interrupt mask handling.
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*/
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static inline unsigned long arch_local_irq_save(void)
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{
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unsigned long flags;
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asm volatile(
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"mrs %0, daif // arch_local_irq_save\n"
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"msr daifset, #2"
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: "=r" (flags)
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:
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: "memory");
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return flags;
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}
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static inline void arch_local_irq_enable(void)
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{
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asm volatile(
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"msr daifclr, #2 // arch_local_irq_enable"
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:
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:
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: "memory");
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}
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static inline void arch_local_irq_disable(void)
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{
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asm volatile(
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"msr daifset, #2 // arch_local_irq_disable"
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:
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:
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: "memory");
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}
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#define local_fiq_enable() asm("msr daifclr, #1" : : : "memory")
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#define local_fiq_disable() asm("msr daifset, #1" : : : "memory")
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#define local_async_enable() asm("msr daifclr, #4" : : : "memory")
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#define local_async_disable() asm("msr daifset, #4" : : : "memory")
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/*
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* Save the current interrupt enable state.
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*/
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static inline unsigned long arch_local_save_flags(void)
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{
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unsigned long flags;
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asm volatile(
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"mrs %0, daif // arch_local_save_flags"
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: "=r" (flags)
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:
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: "memory");
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return flags;
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}
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/*
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* restore saved IRQ state
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*/
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static inline void arch_local_irq_restore(unsigned long flags)
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{
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asm volatile(
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"msr daif, %0 // arch_local_irq_restore"
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:
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: "r" (flags)
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: "memory");
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}
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static inline int arch_irqs_disabled_flags(unsigned long flags)
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{
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return flags & PSR_I_BIT;
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}
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/*
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* save and restore debug state
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*/
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#define local_dbg_save(flags) \
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do { \
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typecheck(unsigned long, flags); \
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asm volatile( \
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"mrs %0, daif // local_dbg_save\n" \
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"msr daifset, #8" \
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: "=r" (flags) : : "memory"); \
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} while (0)
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#define local_dbg_restore(flags) \
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do { \
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typecheck(unsigned long, flags); \
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asm volatile( \
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"msr daif, %0 // local_dbg_restore\n" \
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: : "r" (flags) : "memory"); \
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} while (0)
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#define local_dbg_enable() asm("msr daifclr, #8" : : : "memory")
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#define local_dbg_disable() asm("msr daifset, #8" : : : "memory")
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#endif
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#endif
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