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d53e4307c2
GCC's __builtin_prefetch() was introduced a long time ago, all
supported GCC versions have it. So this patch is to use it for
implementing the prefetch on SH2A and SH4.
The current prefetch implementation is almost equivalent with
__builtin_prefetch.
The third parameter in the __builtin_prefetch is the locality
that it's not supported on SH architectures. It has been set
to three and it should be verified if it's suitable for SH2A
as well. I didn't test on this architecture.
The builtin usage should be more efficient that an __asm__
because less barriers, and because the compiler doesn't see the
inst as a "black box" allowing better code generation.
This has been already done on other architectures (see the commit:
0453fb3c52).
Many thanks to Christian Bruel <christain.bruel@st.com> for his
support on evaluate the impact of the gcc built-in on SH4 arch.
No regressions found while testing with LMbench on STLinux targets.
Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
213 lines
4.6 KiB
C
213 lines
4.6 KiB
C
/*
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* include/asm-sh/processor.h
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*
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* Copyright (C) 1999, 2000 Niibe Yutaka
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* Copyright (C) 2002, 2003 Paul Mundt
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*/
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#ifndef __ASM_SH_PROCESSOR_32_H
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#define __ASM_SH_PROCESSOR_32_H
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#ifdef __KERNEL__
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#include <linux/compiler.h>
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#include <linux/linkage.h>
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#include <asm/page.h>
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#include <asm/types.h>
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#include <asm/hw_breakpoint.h>
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/*
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* Default implementation of macro that returns current
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* instruction pointer ("program counter").
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*/
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#define current_text_addr() ({ void *pc; __asm__("mova 1f, %0\n.align 2\n1:":"=z" (pc)); pc; })
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/* Core Processor Version Register */
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#define CCN_PVR 0xff000030
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#define CCN_CVR 0xff000040
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#define CCN_PRR 0xff000044
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/*
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* User space process size: 2GB.
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*
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* Since SH7709 and SH7750 have "area 7", we can't use 0x7c000000--0x7fffffff
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*/
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#define TASK_SIZE 0x7c000000UL
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#define STACK_TOP TASK_SIZE
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#define STACK_TOP_MAX STACK_TOP
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/* This decides where the kernel will search for a free chunk of vm
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* space during mmap's.
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*/
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#define TASK_UNMAPPED_BASE (TASK_SIZE / 3)
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/*
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* Bit of SR register
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*
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* FD-bit:
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* When it's set, it means the processor doesn't have right to use FPU,
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* and it results exception when the floating operation is executed.
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*
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* IMASK-bit:
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* Interrupt level mask
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*/
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#define SR_DSP 0x00001000
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#define SR_IMASK 0x000000f0
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#define SR_FD 0x00008000
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#define SR_MD 0x40000000
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/*
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* DSP structure and data
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*/
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struct sh_dsp_struct {
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unsigned long dsp_regs[14];
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long status;
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};
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/*
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* FPU structure and data
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*/
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struct sh_fpu_hard_struct {
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unsigned long fp_regs[16];
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unsigned long xfp_regs[16];
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unsigned long fpscr;
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unsigned long fpul;
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long status; /* software status information */
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};
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/* Dummy fpu emulator */
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struct sh_fpu_soft_struct {
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unsigned long fp_regs[16];
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unsigned long xfp_regs[16];
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unsigned long fpscr;
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unsigned long fpul;
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unsigned char lookahead;
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unsigned long entry_pc;
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};
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union thread_xstate {
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struct sh_fpu_hard_struct hardfpu;
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struct sh_fpu_soft_struct softfpu;
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};
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struct thread_struct {
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/* Saved registers when thread is descheduled */
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unsigned long sp;
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unsigned long pc;
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/* Various thread flags, see SH_THREAD_xxx */
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unsigned long flags;
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/* Save middle states of ptrace breakpoints */
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struct perf_event *ptrace_bps[HBP_NUM];
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#ifdef CONFIG_SH_DSP
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/* Dsp status information */
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struct sh_dsp_struct dsp_status;
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#endif
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/* Extended processor state */
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union thread_xstate *xstate;
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};
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#define INIT_THREAD { \
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.sp = sizeof(init_stack) + (long) &init_stack, \
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.flags = 0, \
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}
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/* Forward declaration, a strange C thing */
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struct task_struct;
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extern void start_thread(struct pt_regs *regs, unsigned long new_pc, unsigned long new_sp);
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/* Free all resources held by a thread. */
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extern void release_thread(struct task_struct *);
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/* Prepare to copy thread state - unlazy all lazy status */
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void prepare_to_copy(struct task_struct *tsk);
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/*
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* create a kernel thread without removing it from tasklists
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*/
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extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
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/* Copy and release all segment info associated with a VM */
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#define copy_segments(p, mm) do { } while(0)
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#define release_segments(mm) do { } while(0)
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/*
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* FPU lazy state save handling.
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*/
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static __inline__ void disable_fpu(void)
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{
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unsigned long __dummy;
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/* Set FD flag in SR */
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__asm__ __volatile__("stc sr, %0\n\t"
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"or %1, %0\n\t"
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"ldc %0, sr"
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: "=&r" (__dummy)
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: "r" (SR_FD));
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}
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static __inline__ void enable_fpu(void)
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{
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unsigned long __dummy;
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/* Clear out FD flag in SR */
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__asm__ __volatile__("stc sr, %0\n\t"
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"and %1, %0\n\t"
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"ldc %0, sr"
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: "=&r" (__dummy)
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: "r" (~SR_FD));
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}
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/* Double presision, NANS as NANS, rounding to nearest, no exceptions */
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#define FPSCR_INIT 0x00080000
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#define FPSCR_CAUSE_MASK 0x0001f000 /* Cause bits */
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#define FPSCR_FLAG_MASK 0x0000007c /* Flag bits */
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/*
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* Return saved PC of a blocked thread.
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*/
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#define thread_saved_pc(tsk) (tsk->thread.pc)
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void show_trace(struct task_struct *tsk, unsigned long *sp,
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struct pt_regs *regs);
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#ifdef CONFIG_DUMP_CODE
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void show_code(struct pt_regs *regs);
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#else
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static inline void show_code(struct pt_regs *regs)
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{
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}
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#endif
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extern unsigned long get_wchan(struct task_struct *p);
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#define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc)
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#define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[15])
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#if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH4)
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#define PREFETCH_STRIDE L1_CACHE_BYTES
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#define ARCH_HAS_PREFETCH
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#define ARCH_HAS_PREFETCHW
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static inline void prefetch(void *x)
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{
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__builtin_prefetch(x, 0, 3);
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}
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static inline void prefetchw(void *x)
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{
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__builtin_prefetch(x, 1, 3);
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}
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#endif
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#endif /* __KERNEL__ */
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#endif /* __ASM_SH_PROCESSOR_32_H */
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