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75b272bd09
Enable building the vexpress-osc clock driver as a module. Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Liviu Dudau <liviu.dudau@arm.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Michael Turquette <mturquette@baylibre.com> Cc: linux-clk@vger.kernel.org Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Rob Herring <robh@kernel.org>
123 lines
2.7 KiB
C
123 lines
2.7 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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*
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* Copyright (C) 2012 ARM Limited
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*/
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#include <linux/clkdev.h>
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#include <linux/clk-provider.h>
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#include <linux/err.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/vexpress.h>
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struct vexpress_osc {
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struct regmap *reg;
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struct clk_hw hw;
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unsigned long rate_min;
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unsigned long rate_max;
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};
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#define to_vexpress_osc(osc) container_of(osc, struct vexpress_osc, hw)
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static unsigned long vexpress_osc_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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struct vexpress_osc *osc = to_vexpress_osc(hw);
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u32 rate;
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regmap_read(osc->reg, 0, &rate);
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return rate;
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}
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static long vexpress_osc_round_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long *parent_rate)
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{
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struct vexpress_osc *osc = to_vexpress_osc(hw);
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if (osc->rate_min && rate < osc->rate_min)
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rate = osc->rate_min;
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if (osc->rate_max && rate > osc->rate_max)
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rate = osc->rate_max;
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return rate;
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}
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static int vexpress_osc_set_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long parent_rate)
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{
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struct vexpress_osc *osc = to_vexpress_osc(hw);
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return regmap_write(osc->reg, 0, rate);
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}
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static const struct clk_ops vexpress_osc_ops = {
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.recalc_rate = vexpress_osc_recalc_rate,
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.round_rate = vexpress_osc_round_rate,
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.set_rate = vexpress_osc_set_rate,
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};
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static int vexpress_osc_probe(struct platform_device *pdev)
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{
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struct clk_init_data init;
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struct vexpress_osc *osc;
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u32 range[2];
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int ret;
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osc = devm_kzalloc(&pdev->dev, sizeof(*osc), GFP_KERNEL);
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if (!osc)
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return -ENOMEM;
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osc->reg = devm_regmap_init_vexpress_config(&pdev->dev);
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if (IS_ERR(osc->reg))
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return PTR_ERR(osc->reg);
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if (of_property_read_u32_array(pdev->dev.of_node, "freq-range", range,
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ARRAY_SIZE(range)) == 0) {
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osc->rate_min = range[0];
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osc->rate_max = range[1];
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}
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if (of_property_read_string(pdev->dev.of_node, "clock-output-names",
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&init.name) != 0)
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init.name = dev_name(&pdev->dev);
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init.ops = &vexpress_osc_ops;
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init.flags = 0;
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init.num_parents = 0;
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osc->hw.init = &init;
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ret = devm_clk_hw_register(&pdev->dev, &osc->hw);
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if (ret < 0)
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return ret;
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devm_of_clk_add_hw_provider(&pdev->dev, of_clk_hw_simple_get, &osc->hw);
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clk_hw_set_rate_range(&osc->hw, osc->rate_min, osc->rate_max);
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dev_dbg(&pdev->dev, "Registered clock '%s'\n", init.name);
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return 0;
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}
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static const struct of_device_id vexpress_osc_of_match[] = {
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{ .compatible = "arm,vexpress-osc", },
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{}
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};
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MODULE_DEVICE_TABLE(of, vexpress_osc_of_match);
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static struct platform_driver vexpress_osc_driver = {
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.driver = {
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.name = "vexpress-osc",
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.of_match_table = vexpress_osc_of_match,
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},
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.probe = vexpress_osc_probe,
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};
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module_platform_driver(vexpress_osc_driver);
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MODULE_LICENSE("GPL v2");
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