mirror of
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cb7a01ac32
Move ancillary I2C drivers into drivers/media/i2c, in order to better organize them. Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
592 lines
15 KiB
C
592 lines
15 KiB
C
/*
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* vpx3220a, vpx3216b & vpx3214c video decoder driver version 0.0.1
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*
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* Copyright (C) 2001 Laurent Pinchart <lpinchart@freegates.be>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/types.h>
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#include <linux/slab.h>
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#include <asm/uaccess.h>
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#include <linux/i2c.h>
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#include <linux/videodev2.h>
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#include <media/v4l2-device.h>
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#include <media/v4l2-chip-ident.h>
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#include <media/v4l2-ctrls.h>
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MODULE_DESCRIPTION("vpx3220a/vpx3216b/vpx3214c video decoder driver");
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MODULE_AUTHOR("Laurent Pinchart");
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MODULE_LICENSE("GPL");
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static int debug;
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module_param(debug, int, 0);
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MODULE_PARM_DESC(debug, "Debug level (0-1)");
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#define VPX_TIMEOUT_COUNT 10
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/* ----------------------------------------------------------------------- */
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struct vpx3220 {
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struct v4l2_subdev sd;
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struct v4l2_ctrl_handler hdl;
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unsigned char reg[255];
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v4l2_std_id norm;
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int ident;
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int input;
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int enable;
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};
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static inline struct vpx3220 *to_vpx3220(struct v4l2_subdev *sd)
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{
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return container_of(sd, struct vpx3220, sd);
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}
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static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
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{
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return &container_of(ctrl->handler, struct vpx3220, hdl)->sd;
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}
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static char *inputs[] = { "internal", "composite", "svideo" };
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/* ----------------------------------------------------------------------- */
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static inline int vpx3220_write(struct v4l2_subdev *sd, u8 reg, u8 value)
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{
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struct i2c_client *client = v4l2_get_subdevdata(sd);
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struct vpx3220 *decoder = i2c_get_clientdata(client);
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decoder->reg[reg] = value;
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return i2c_smbus_write_byte_data(client, reg, value);
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}
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static inline int vpx3220_read(struct v4l2_subdev *sd, u8 reg)
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{
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struct i2c_client *client = v4l2_get_subdevdata(sd);
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return i2c_smbus_read_byte_data(client, reg);
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}
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static int vpx3220_fp_status(struct v4l2_subdev *sd)
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{
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unsigned char status;
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unsigned int i;
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for (i = 0; i < VPX_TIMEOUT_COUNT; i++) {
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status = vpx3220_read(sd, 0x29);
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if (!(status & 4))
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return 0;
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udelay(10);
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if (need_resched())
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cond_resched();
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}
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return -1;
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}
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static int vpx3220_fp_write(struct v4l2_subdev *sd, u8 fpaddr, u16 data)
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{
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struct i2c_client *client = v4l2_get_subdevdata(sd);
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/* Write the 16-bit address to the FPWR register */
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if (i2c_smbus_write_word_data(client, 0x27, swab16(fpaddr)) == -1) {
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v4l2_dbg(1, debug, sd, "%s: failed\n", __func__);
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return -1;
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}
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if (vpx3220_fp_status(sd) < 0)
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return -1;
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/* Write the 16-bit data to the FPDAT register */
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if (i2c_smbus_write_word_data(client, 0x28, swab16(data)) == -1) {
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v4l2_dbg(1, debug, sd, "%s: failed\n", __func__);
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return -1;
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}
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return 0;
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}
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static u16 vpx3220_fp_read(struct v4l2_subdev *sd, u16 fpaddr)
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{
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struct i2c_client *client = v4l2_get_subdevdata(sd);
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s16 data;
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/* Write the 16-bit address to the FPRD register */
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if (i2c_smbus_write_word_data(client, 0x26, swab16(fpaddr)) == -1) {
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v4l2_dbg(1, debug, sd, "%s: failed\n", __func__);
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return -1;
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}
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if (vpx3220_fp_status(sd) < 0)
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return -1;
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/* Read the 16-bit data from the FPDAT register */
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data = i2c_smbus_read_word_data(client, 0x28);
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if (data == -1) {
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v4l2_dbg(1, debug, sd, "%s: failed\n", __func__);
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return -1;
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}
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return swab16(data);
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}
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static int vpx3220_write_block(struct v4l2_subdev *sd, const u8 *data, unsigned int len)
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{
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u8 reg;
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int ret = -1;
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while (len >= 2) {
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reg = *data++;
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ret = vpx3220_write(sd, reg, *data++);
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if (ret < 0)
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break;
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len -= 2;
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}
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return ret;
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}
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static int vpx3220_write_fp_block(struct v4l2_subdev *sd,
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const u16 *data, unsigned int len)
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{
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u8 reg;
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int ret = 0;
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while (len > 1) {
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reg = *data++;
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ret |= vpx3220_fp_write(sd, reg, *data++);
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len -= 2;
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}
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return ret;
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}
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/* ---------------------------------------------------------------------- */
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static const unsigned short init_ntsc[] = {
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0x1c, 0x00, /* NTSC tint angle */
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0x88, 17, /* Window 1 vertical */
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0x89, 240, /* Vertical lines in */
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0x8a, 240, /* Vertical lines out */
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0x8b, 000, /* Horizontal begin */
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0x8c, 640, /* Horizontal length */
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0x8d, 640, /* Number of pixels */
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0x8f, 0xc00, /* Disable window 2 */
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0xf0, 0x73, /* 13.5 MHz transport, Forced
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* mode, latch windows */
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0xf2, 0x13, /* NTSC M, composite input */
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0xe7, 0x1e1, /* Enable vertical standard
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* locking @ 240 lines */
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};
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static const unsigned short init_pal[] = {
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0x88, 23, /* Window 1 vertical begin */
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0x89, 288, /* Vertical lines in (16 lines
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* skipped by the VFE) */
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0x8a, 288, /* Vertical lines out (16 lines
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* skipped by the VFE) */
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0x8b, 16, /* Horizontal begin */
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0x8c, 768, /* Horizontal length */
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0x8d, 784, /* Number of pixels
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* Must be >= Horizontal begin + Horizontal length */
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0x8f, 0xc00, /* Disable window 2 */
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0xf0, 0x77, /* 13.5 MHz transport, Forced
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* mode, latch windows */
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0xf2, 0x3d1, /* PAL B,G,H,I, composite input */
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0xe7, 0x241, /* PAL/SECAM set to 288 lines */
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};
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static const unsigned short init_secam[] = {
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0x88, 23, /* Window 1 vertical begin */
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0x89, 288, /* Vertical lines in (16 lines
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* skipped by the VFE) */
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0x8a, 288, /* Vertical lines out (16 lines
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* skipped by the VFE) */
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0x8b, 16, /* Horizontal begin */
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0x8c, 768, /* Horizontal length */
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0x8d, 784, /* Number of pixels
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* Must be >= Horizontal begin + Horizontal length */
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0x8f, 0xc00, /* Disable window 2 */
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0xf0, 0x77, /* 13.5 MHz transport, Forced
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* mode, latch windows */
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0xf2, 0x3d5, /* SECAM, composite input */
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0xe7, 0x241, /* PAL/SECAM set to 288 lines */
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};
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static const unsigned char init_common[] = {
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0xf2, 0x00, /* Disable all outputs */
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0x33, 0x0d, /* Luma : VIN2, Chroma : CIN
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* (clamp off) */
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0xd8, 0xa8, /* HREF/VREF active high, VREF
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* pulse = 2, Odd/Even flag */
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0x20, 0x03, /* IF compensation 0dB/oct */
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0xe0, 0xff, /* Open up all comparators */
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0xe1, 0x00,
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0xe2, 0x7f,
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0xe3, 0x80,
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0xe4, 0x7f,
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0xe5, 0x80,
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0xe6, 0x00, /* Brightness set to 0 */
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0xe7, 0xe0, /* Contrast to 1.0, noise shaping
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* 10 to 8 2-bit error diffusion */
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0xe8, 0xf8, /* YUV422, CbCr binary offset,
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* ... (p.32) */
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0xea, 0x18, /* LLC2 connected, output FIFO
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* reset with VACTintern */
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0xf0, 0x8a, /* Half full level to 10, bus
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* shuffler [7:0, 23:16, 15:8] */
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0xf1, 0x18, /* Single clock, sync mode, no
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* FE delay, no HLEN counter */
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0xf8, 0x12, /* Port A, PIXCLK, HF# & FE#
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* strength to 2 */
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0xf9, 0x24, /* Port B, HREF, VREF, PREF &
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* ALPHA strength to 4 */
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};
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static const unsigned short init_fp[] = {
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0x59, 0,
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0xa0, 2070, /* ACC reference */
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0xa3, 0,
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0xa4, 0,
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0xa8, 30,
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0xb2, 768,
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0xbe, 27,
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0x58, 0,
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0x26, 0,
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0x4b, 0x298, /* PLL gain */
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};
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static int vpx3220_init(struct v4l2_subdev *sd, u32 val)
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{
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struct vpx3220 *decoder = to_vpx3220(sd);
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vpx3220_write_block(sd, init_common, sizeof(init_common));
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vpx3220_write_fp_block(sd, init_fp, sizeof(init_fp) >> 1);
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if (decoder->norm & V4L2_STD_NTSC)
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vpx3220_write_fp_block(sd, init_ntsc, sizeof(init_ntsc) >> 1);
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else if (decoder->norm & V4L2_STD_PAL)
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vpx3220_write_fp_block(sd, init_pal, sizeof(init_pal) >> 1);
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else if (decoder->norm & V4L2_STD_SECAM)
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vpx3220_write_fp_block(sd, init_secam, sizeof(init_secam) >> 1);
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else
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vpx3220_write_fp_block(sd, init_pal, sizeof(init_pal) >> 1);
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return 0;
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}
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static int vpx3220_status(struct v4l2_subdev *sd, u32 *pstatus, v4l2_std_id *pstd)
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{
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int res = V4L2_IN_ST_NO_SIGNAL, status;
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v4l2_std_id std = 0;
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status = vpx3220_fp_read(sd, 0x0f3);
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v4l2_dbg(1, debug, sd, "status: 0x%04x\n", status);
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if (status < 0)
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return status;
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if ((status & 0x20) == 0) {
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res = 0;
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switch (status & 0x18) {
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case 0x00:
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case 0x10:
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case 0x14:
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case 0x18:
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std = V4L2_STD_PAL;
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break;
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case 0x08:
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std = V4L2_STD_SECAM;
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break;
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case 0x04:
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case 0x0c:
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case 0x1c:
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std = V4L2_STD_NTSC;
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break;
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}
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}
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if (pstd)
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*pstd = std;
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if (pstatus)
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*pstatus = res;
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return 0;
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}
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static int vpx3220_querystd(struct v4l2_subdev *sd, v4l2_std_id *std)
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{
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v4l2_dbg(1, debug, sd, "querystd\n");
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return vpx3220_status(sd, NULL, std);
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}
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static int vpx3220_g_input_status(struct v4l2_subdev *sd, u32 *status)
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{
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v4l2_dbg(1, debug, sd, "g_input_status\n");
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return vpx3220_status(sd, status, NULL);
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}
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static int vpx3220_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
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{
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struct vpx3220 *decoder = to_vpx3220(sd);
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int temp_input;
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/* Here we back up the input selection because it gets
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overwritten when we fill the registers with the
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chosen video norm */
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temp_input = vpx3220_fp_read(sd, 0xf2);
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v4l2_dbg(1, debug, sd, "s_std %llx\n", (unsigned long long)std);
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if (std & V4L2_STD_NTSC) {
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vpx3220_write_fp_block(sd, init_ntsc, sizeof(init_ntsc) >> 1);
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v4l2_dbg(1, debug, sd, "norm switched to NTSC\n");
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} else if (std & V4L2_STD_PAL) {
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vpx3220_write_fp_block(sd, init_pal, sizeof(init_pal) >> 1);
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v4l2_dbg(1, debug, sd, "norm switched to PAL\n");
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} else if (std & V4L2_STD_SECAM) {
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vpx3220_write_fp_block(sd, init_secam, sizeof(init_secam) >> 1);
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v4l2_dbg(1, debug, sd, "norm switched to SECAM\n");
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} else {
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return -EINVAL;
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}
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decoder->norm = std;
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/* And here we set the backed up video input again */
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vpx3220_fp_write(sd, 0xf2, temp_input | 0x0010);
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udelay(10);
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return 0;
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}
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static int vpx3220_s_routing(struct v4l2_subdev *sd,
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u32 input, u32 output, u32 config)
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{
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int data;
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/* RJ: input = 0: ST8 (PCTV) input
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input = 1: COMPOSITE input
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input = 2: SVHS input */
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const int input_vals[3][2] = {
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{0x0c, 0},
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{0x0d, 0},
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{0x0e, 1}
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};
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if (input > 2)
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return -EINVAL;
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v4l2_dbg(1, debug, sd, "input switched to %s\n", inputs[input]);
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vpx3220_write(sd, 0x33, input_vals[input][0]);
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data = vpx3220_fp_read(sd, 0xf2) & ~(0x0020);
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if (data < 0)
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return data;
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/* 0x0010 is required to latch the setting */
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vpx3220_fp_write(sd, 0xf2,
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data | (input_vals[input][1] << 5) | 0x0010);
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udelay(10);
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return 0;
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}
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static int vpx3220_s_stream(struct v4l2_subdev *sd, int enable)
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{
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v4l2_dbg(1, debug, sd, "s_stream %s\n", enable ? "on" : "off");
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vpx3220_write(sd, 0xf2, (enable ? 0x1b : 0x00));
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return 0;
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}
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static int vpx3220_s_ctrl(struct v4l2_ctrl *ctrl)
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{
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struct v4l2_subdev *sd = to_sd(ctrl);
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switch (ctrl->id) {
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case V4L2_CID_BRIGHTNESS:
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vpx3220_write(sd, 0xe6, ctrl->val);
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return 0;
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case V4L2_CID_CONTRAST:
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/* Bit 7 and 8 is for noise shaping */
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vpx3220_write(sd, 0xe7, ctrl->val + 192);
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return 0;
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case V4L2_CID_SATURATION:
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vpx3220_fp_write(sd, 0xa0, ctrl->val);
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return 0;
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case V4L2_CID_HUE:
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vpx3220_fp_write(sd, 0x1c, ctrl->val);
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return 0;
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}
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return -EINVAL;
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}
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static int vpx3220_g_chip_ident(struct v4l2_subdev *sd, struct v4l2_dbg_chip_ident *chip)
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{
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struct vpx3220 *decoder = to_vpx3220(sd);
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struct i2c_client *client = v4l2_get_subdevdata(sd);
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return v4l2_chip_ident_i2c_client(client, chip, decoder->ident, 0);
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}
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/* ----------------------------------------------------------------------- */
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static const struct v4l2_ctrl_ops vpx3220_ctrl_ops = {
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.s_ctrl = vpx3220_s_ctrl,
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};
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static const struct v4l2_subdev_core_ops vpx3220_core_ops = {
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.g_chip_ident = vpx3220_g_chip_ident,
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.init = vpx3220_init,
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.g_ext_ctrls = v4l2_subdev_g_ext_ctrls,
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.try_ext_ctrls = v4l2_subdev_try_ext_ctrls,
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.s_ext_ctrls = v4l2_subdev_s_ext_ctrls,
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.g_ctrl = v4l2_subdev_g_ctrl,
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.s_ctrl = v4l2_subdev_s_ctrl,
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.queryctrl = v4l2_subdev_queryctrl,
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.querymenu = v4l2_subdev_querymenu,
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.s_std = vpx3220_s_std,
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};
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static const struct v4l2_subdev_video_ops vpx3220_video_ops = {
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.s_routing = vpx3220_s_routing,
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.s_stream = vpx3220_s_stream,
|
|
.querystd = vpx3220_querystd,
|
|
.g_input_status = vpx3220_g_input_status,
|
|
};
|
|
|
|
static const struct v4l2_subdev_ops vpx3220_ops = {
|
|
.core = &vpx3220_core_ops,
|
|
.video = &vpx3220_video_ops,
|
|
};
|
|
|
|
/* -----------------------------------------------------------------------
|
|
* Client management code
|
|
*/
|
|
|
|
static int vpx3220_probe(struct i2c_client *client,
|
|
const struct i2c_device_id *id)
|
|
{
|
|
struct vpx3220 *decoder;
|
|
struct v4l2_subdev *sd;
|
|
const char *name = NULL;
|
|
u8 ver;
|
|
u16 pn;
|
|
|
|
/* Check if the adapter supports the needed features */
|
|
if (!i2c_check_functionality(client->adapter,
|
|
I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA))
|
|
return -ENODEV;
|
|
|
|
decoder = kzalloc(sizeof(struct vpx3220), GFP_KERNEL);
|
|
if (decoder == NULL)
|
|
return -ENOMEM;
|
|
sd = &decoder->sd;
|
|
v4l2_i2c_subdev_init(sd, client, &vpx3220_ops);
|
|
decoder->norm = V4L2_STD_PAL;
|
|
decoder->input = 0;
|
|
decoder->enable = 1;
|
|
v4l2_ctrl_handler_init(&decoder->hdl, 4);
|
|
v4l2_ctrl_new_std(&decoder->hdl, &vpx3220_ctrl_ops,
|
|
V4L2_CID_BRIGHTNESS, -128, 127, 1, 0);
|
|
v4l2_ctrl_new_std(&decoder->hdl, &vpx3220_ctrl_ops,
|
|
V4L2_CID_CONTRAST, 0, 63, 1, 32);
|
|
v4l2_ctrl_new_std(&decoder->hdl, &vpx3220_ctrl_ops,
|
|
V4L2_CID_SATURATION, 0, 4095, 1, 2048);
|
|
v4l2_ctrl_new_std(&decoder->hdl, &vpx3220_ctrl_ops,
|
|
V4L2_CID_HUE, -512, 511, 1, 0);
|
|
sd->ctrl_handler = &decoder->hdl;
|
|
if (decoder->hdl.error) {
|
|
int err = decoder->hdl.error;
|
|
|
|
v4l2_ctrl_handler_free(&decoder->hdl);
|
|
kfree(decoder);
|
|
return err;
|
|
}
|
|
v4l2_ctrl_handler_setup(&decoder->hdl);
|
|
|
|
ver = i2c_smbus_read_byte_data(client, 0x00);
|
|
pn = (i2c_smbus_read_byte_data(client, 0x02) << 8) +
|
|
i2c_smbus_read_byte_data(client, 0x01);
|
|
decoder->ident = V4L2_IDENT_VPX3220A;
|
|
if (ver == 0xec) {
|
|
switch (pn) {
|
|
case 0x4680:
|
|
name = "vpx3220a";
|
|
break;
|
|
case 0x4260:
|
|
name = "vpx3216b";
|
|
decoder->ident = V4L2_IDENT_VPX3216B;
|
|
break;
|
|
case 0x4280:
|
|
name = "vpx3214c";
|
|
decoder->ident = V4L2_IDENT_VPX3214C;
|
|
break;
|
|
}
|
|
}
|
|
if (name)
|
|
v4l2_info(sd, "%s found @ 0x%x (%s)\n", name,
|
|
client->addr << 1, client->adapter->name);
|
|
else
|
|
v4l2_info(sd, "chip (%02x:%04x) found @ 0x%x (%s)\n",
|
|
ver, pn, client->addr << 1, client->adapter->name);
|
|
|
|
vpx3220_write_block(sd, init_common, sizeof(init_common));
|
|
vpx3220_write_fp_block(sd, init_fp, sizeof(init_fp) >> 1);
|
|
/* Default to PAL */
|
|
vpx3220_write_fp_block(sd, init_pal, sizeof(init_pal) >> 1);
|
|
return 0;
|
|
}
|
|
|
|
static int vpx3220_remove(struct i2c_client *client)
|
|
{
|
|
struct v4l2_subdev *sd = i2c_get_clientdata(client);
|
|
struct vpx3220 *decoder = to_vpx3220(sd);
|
|
|
|
v4l2_device_unregister_subdev(sd);
|
|
v4l2_ctrl_handler_free(&decoder->hdl);
|
|
kfree(decoder);
|
|
return 0;
|
|
}
|
|
|
|
static const struct i2c_device_id vpx3220_id[] = {
|
|
{ "vpx3220a", 0 },
|
|
{ "vpx3216b", 0 },
|
|
{ "vpx3214c", 0 },
|
|
{ }
|
|
};
|
|
MODULE_DEVICE_TABLE(i2c, vpx3220_id);
|
|
|
|
static struct i2c_driver vpx3220_driver = {
|
|
.driver = {
|
|
.owner = THIS_MODULE,
|
|
.name = "vpx3220",
|
|
},
|
|
.probe = vpx3220_probe,
|
|
.remove = vpx3220_remove,
|
|
.id_table = vpx3220_id,
|
|
};
|
|
|
|
module_i2c_driver(vpx3220_driver);
|