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This patch adds phys and phy-names for sdhci-of-arasan as required properties for arasan,sdhci-5.1, and details the example as well. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
45 lines
1.5 KiB
Plaintext
45 lines
1.5 KiB
Plaintext
Device Tree Bindings for the Arasan SDHCI Controller
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The bindings follow the mmc[1], clock[2], interrupt[3] and phy[4] bindings.
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Only deviations are documented here.
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[1] Documentation/devicetree/bindings/mmc/mmc.txt
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[2] Documentation/devicetree/bindings/clock/clock-bindings.txt
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[3] Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
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[4] Documentation/devicetree/bindings/phy/phy-bindings.txt
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Required Properties:
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- compatible: Compatibility string. Must be 'arasan,sdhci-8.9a' or
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'arasan,sdhci-4.9a' or 'arasan,sdhci-5.1'
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- reg: From mmc bindings: Register location and length.
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- clocks: From clock bindings: Handles to clock inputs.
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- clock-names: From clock bindings: Tuple including "clk_xin" and "clk_ahb"
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- interrupts: Interrupt specifier
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- interrupt-parent: Phandle for the interrupt controller that services
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interrupts for this device.
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Required Properties for "arasan,sdhci-5.1":
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- phys: From PHY bindings: Phandle for the Generic PHY for arasan.
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- phy-names: MUST be "phy_arasan".
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Example:
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sdhci@e0100000 {
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compatible = "arasan,sdhci-8.9a";
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reg = <0xe0100000 0x1000>;
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clock-names = "clk_xin", "clk_ahb";
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clocks = <&clkc 21>, <&clkc 32>;
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interrupt-parent = <&gic>;
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interrupts = <0 24 4>;
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} ;
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sdhci@e2800000 {
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compatible = "arasan,sdhci-5.1";
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reg = <0xe2800000 0x1000>;
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clock-names = "clk_xin", "clk_ahb";
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clocks = <&cru 8>, <&cru 18>;
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interrupt-parent = <&gic>;
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interrupts = <0 24 4>;
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phys = <&emmc_phy>;
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phy-names = "phy_arasan";
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} ;
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