Gabor Juhos 97541ccfb9 MIPS: ath79: Fix CPU/DDR frequency calculation for SRIF PLLs ... Besides the CPU and DDR PLLs, the CPU and DDR frequencies can be derived from other PLLs in the SRIF block on the AR934x SoCs. The current code does not checks if the SRIF PLLs are used and this can lead to incorrectly calculated CPU/DDR frequencies. Fix it by calculating the frequencies from SRIF PLLs if those are used on a given board. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: <stable@vger.kernel.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4324/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>		2012-10-01 11:37:15 +02:00
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asm	MIPS: ath79: Fix CPU/DDR frequency calculation for SRIF PLLs	2012-10-01 11:37:15 +02:00