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372400344a
The allwinner SDK uses a value of 3 for the disconnect threshold setting on sun6i, do the same in the kernel. In my previous experience with sun5i problems getting the threshold right is important to avoid usb2 devices being unplugged sometimes going unnoticed. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
339 lines
8.3 KiB
C
339 lines
8.3 KiB
C
/*
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* Allwinner sun4i USB phy driver
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*
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* Copyright (C) 2014 Hans de Goede <hdegoede@redhat.com>
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*
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* Based on code from
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* Allwinner Technology Co., Ltd. <www.allwinnertech.com>
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*
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* Modelled after: Samsung S5P/EXYNOS SoC series MIPI CSIS/DSIM DPHY driver
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* Copyright (C) 2013 Samsung Electronics Co., Ltd.
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* Author: Sylwester Nawrocki <s.nawrocki@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/phy/phy.h>
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#include <linux/platform_device.h>
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#include <linux/regulator/consumer.h>
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#include <linux/reset.h>
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#define REG_ISCR 0x00
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#define REG_PHYCTL 0x04
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#define REG_PHYBIST 0x08
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#define REG_PHYTUNE 0x0c
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#define PHYCTL_DATA BIT(7)
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#define SUNXI_AHB_ICHR8_EN BIT(10)
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#define SUNXI_AHB_INCR4_BURST_EN BIT(9)
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#define SUNXI_AHB_INCRX_ALIGN_EN BIT(8)
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#define SUNXI_ULPI_BYPASS_EN BIT(0)
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/* Common Control Bits for Both PHYs */
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#define PHY_PLL_BW 0x03
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#define PHY_RES45_CAL_EN 0x0c
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/* Private Control Bits for Each PHY */
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#define PHY_TX_AMPLITUDE_TUNE 0x20
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#define PHY_TX_SLEWRATE_TUNE 0x22
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#define PHY_VBUSVALID_TH_SEL 0x25
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#define PHY_PULLUP_RES_SEL 0x27
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#define PHY_OTG_FUNC_EN 0x28
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#define PHY_VBUS_DET_EN 0x29
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#define PHY_DISCON_TH_SEL 0x2a
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#define MAX_PHYS 3
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struct sun4i_usb_phy_data {
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void __iomem *base;
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struct mutex mutex;
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int num_phys;
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u32 disc_thresh;
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struct sun4i_usb_phy {
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struct phy *phy;
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void __iomem *pmu;
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struct regulator *vbus;
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struct reset_control *reset;
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struct clk *clk;
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int index;
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} phys[MAX_PHYS];
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};
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#define to_sun4i_usb_phy_data(phy) \
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container_of((phy), struct sun4i_usb_phy_data, phys[(phy)->index])
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static void sun4i_usb_phy_write(struct sun4i_usb_phy *phy, u32 addr, u32 data,
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int len)
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{
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struct sun4i_usb_phy_data *phy_data = to_sun4i_usb_phy_data(phy);
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u32 temp, usbc_bit = BIT(phy->index * 2);
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int i;
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mutex_lock(&phy_data->mutex);
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for (i = 0; i < len; i++) {
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temp = readl(phy_data->base + REG_PHYCTL);
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/* clear the address portion */
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temp &= ~(0xff << 8);
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/* set the address */
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temp |= ((addr + i) << 8);
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writel(temp, phy_data->base + REG_PHYCTL);
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/* set the data bit and clear usbc bit*/
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temp = readb(phy_data->base + REG_PHYCTL);
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if (data & 0x1)
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temp |= PHYCTL_DATA;
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else
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temp &= ~PHYCTL_DATA;
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temp &= ~usbc_bit;
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writeb(temp, phy_data->base + REG_PHYCTL);
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/* pulse usbc_bit */
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temp = readb(phy_data->base + REG_PHYCTL);
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temp |= usbc_bit;
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writeb(temp, phy_data->base + REG_PHYCTL);
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temp = readb(phy_data->base + REG_PHYCTL);
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temp &= ~usbc_bit;
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writeb(temp, phy_data->base + REG_PHYCTL);
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data >>= 1;
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}
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mutex_unlock(&phy_data->mutex);
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}
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static void sun4i_usb_phy_passby(struct sun4i_usb_phy *phy, int enable)
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{
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u32 bits, reg_value;
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if (!phy->pmu)
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return;
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bits = SUNXI_AHB_ICHR8_EN | SUNXI_AHB_INCR4_BURST_EN |
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SUNXI_AHB_INCRX_ALIGN_EN | SUNXI_ULPI_BYPASS_EN;
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reg_value = readl(phy->pmu);
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if (enable)
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reg_value |= bits;
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else
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reg_value &= ~bits;
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writel(reg_value, phy->pmu);
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}
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static int sun4i_usb_phy_init(struct phy *_phy)
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{
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struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
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struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
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int ret;
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ret = clk_prepare_enable(phy->clk);
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if (ret)
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return ret;
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ret = reset_control_deassert(phy->reset);
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if (ret) {
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clk_disable_unprepare(phy->clk);
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return ret;
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}
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/* Enable USB 45 Ohm resistor calibration */
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if (phy->index == 0)
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sun4i_usb_phy_write(phy, PHY_RES45_CAL_EN, 0x01, 1);
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/* Adjust PHY's magnitude and rate */
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sun4i_usb_phy_write(phy, PHY_TX_AMPLITUDE_TUNE, 0x14, 5);
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/* Disconnect threshold adjustment */
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sun4i_usb_phy_write(phy, PHY_DISCON_TH_SEL, data->disc_thresh, 2);
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sun4i_usb_phy_passby(phy, 1);
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return 0;
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}
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static int sun4i_usb_phy_exit(struct phy *_phy)
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{
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struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
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sun4i_usb_phy_passby(phy, 0);
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reset_control_assert(phy->reset);
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clk_disable_unprepare(phy->clk);
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return 0;
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}
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static int sun4i_usb_phy_power_on(struct phy *_phy)
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{
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struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
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int ret = 0;
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if (phy->vbus)
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ret = regulator_enable(phy->vbus);
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return ret;
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}
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static int sun4i_usb_phy_power_off(struct phy *_phy)
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{
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struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
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if (phy->vbus)
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regulator_disable(phy->vbus);
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return 0;
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}
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static struct phy_ops sun4i_usb_phy_ops = {
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.init = sun4i_usb_phy_init,
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.exit = sun4i_usb_phy_exit,
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.power_on = sun4i_usb_phy_power_on,
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.power_off = sun4i_usb_phy_power_off,
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.owner = THIS_MODULE,
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};
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static struct phy *sun4i_usb_phy_xlate(struct device *dev,
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struct of_phandle_args *args)
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{
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struct sun4i_usb_phy_data *data = dev_get_drvdata(dev);
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if (args->args[0] >= data->num_phys)
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return ERR_PTR(-ENODEV);
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return data->phys[args->args[0]].phy;
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}
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static int sun4i_usb_phy_probe(struct platform_device *pdev)
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{
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struct sun4i_usb_phy_data *data;
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struct device *dev = &pdev->dev;
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struct device_node *np = dev->of_node;
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struct phy_provider *phy_provider;
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bool dedicated_clocks;
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struct resource *res;
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int i;
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data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
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if (!data)
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return -ENOMEM;
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mutex_init(&data->mutex);
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if (of_device_is_compatible(np, "allwinner,sun5i-a13-usb-phy"))
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data->num_phys = 2;
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else
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data->num_phys = 3;
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if (of_device_is_compatible(np, "allwinner,sun4i-a10-usb-phy") ||
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of_device_is_compatible(np, "allwinner,sun6i-a31-usb-phy"))
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data->disc_thresh = 3;
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else
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data->disc_thresh = 2;
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if (of_device_is_compatible(np, "allwinner,sun6i-a31-usb-phy"))
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dedicated_clocks = true;
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else
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dedicated_clocks = false;
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res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "phy_ctrl");
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data->base = devm_ioremap_resource(dev, res);
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if (IS_ERR(data->base))
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return PTR_ERR(data->base);
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for (i = 0; i < data->num_phys; i++) {
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struct sun4i_usb_phy *phy = data->phys + i;
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char name[16];
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snprintf(name, sizeof(name), "usb%d_vbus", i);
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phy->vbus = devm_regulator_get_optional(dev, name);
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if (IS_ERR(phy->vbus)) {
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if (PTR_ERR(phy->vbus) == -EPROBE_DEFER)
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return -EPROBE_DEFER;
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phy->vbus = NULL;
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}
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if (dedicated_clocks)
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snprintf(name, sizeof(name), "usb%d_phy", i);
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else
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strlcpy(name, "usb_phy", sizeof(name));
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phy->clk = devm_clk_get(dev, name);
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if (IS_ERR(phy->clk)) {
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dev_err(dev, "failed to get clock %s\n", name);
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return PTR_ERR(phy->clk);
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}
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snprintf(name, sizeof(name), "usb%d_reset", i);
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phy->reset = devm_reset_control_get(dev, name);
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if (IS_ERR(phy->reset)) {
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dev_err(dev, "failed to get reset %s\n", name);
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return PTR_ERR(phy->reset);
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}
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if (i) { /* No pmu for usbc0 */
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snprintf(name, sizeof(name), "pmu%d", i);
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res = platform_get_resource_byname(pdev,
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IORESOURCE_MEM, name);
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phy->pmu = devm_ioremap_resource(dev, res);
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if (IS_ERR(phy->pmu))
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return PTR_ERR(phy->pmu);
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}
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phy->phy = devm_phy_create(dev, NULL, &sun4i_usb_phy_ops);
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if (IS_ERR(phy->phy)) {
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dev_err(dev, "failed to create PHY %d\n", i);
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return PTR_ERR(phy->phy);
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}
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phy->index = i;
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phy_set_drvdata(phy->phy, &data->phys[i]);
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}
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dev_set_drvdata(dev, data);
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phy_provider = devm_of_phy_provider_register(dev, sun4i_usb_phy_xlate);
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return PTR_ERR_OR_ZERO(phy_provider);
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}
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static const struct of_device_id sun4i_usb_phy_of_match[] = {
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{ .compatible = "allwinner,sun4i-a10-usb-phy" },
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{ .compatible = "allwinner,sun5i-a13-usb-phy" },
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{ .compatible = "allwinner,sun6i-a31-usb-phy" },
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{ .compatible = "allwinner,sun7i-a20-usb-phy" },
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{ },
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};
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MODULE_DEVICE_TABLE(of, sun4i_usb_phy_of_match);
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static struct platform_driver sun4i_usb_phy_driver = {
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.probe = sun4i_usb_phy_probe,
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.driver = {
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.of_match_table = sun4i_usb_phy_of_match,
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.name = "sun4i-usb-phy",
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}
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};
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module_platform_driver(sun4i_usb_phy_driver);
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MODULE_DESCRIPTION("Allwinner sun4i USB phy driver");
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MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
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MODULE_LICENSE("GPL v2");
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