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The devices from the ADAU17X1 family all have a MCLK clock input which supplies the master clock for the device. The master clock is used as the input clock for the PLL. Currently the MCLK rate as well as the desired PLL output frequency need to be supplied by calling snd_soc_dai_set_pll() form a machine driver. Add support for specifying the MCLK using the common clock framework. In addition to that also automatically configure the PLL to a suitable rate if the master clock was provided using the CCW. This allows to use the CODEC driver without any special configuration requirements from the machine driver. While the PLL output frequency can be configured over a (more or less) continuous range the narrowness of the range and the other constraints of the clocking tree usually only result in two output frequencies that will actually be chosen. One for 44.1kHz based rates and one for 48kHz based rates, these are the rates that the automatic PLL configuration will use. For the rare case where a non-standard setup is required a machine driver can disable the auto-configuration and configure a custom frequency using the existing mechanisms. If the common clock framework is not enabled clk_get() will return NULL and the driver will function as before and the clock rate needs to be configured manually. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Mark Brown <broonie@kernel.org>
89 lines
2.0 KiB
C
89 lines
2.0 KiB
C
/*
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* Driver for ADAU1361/ADAU1461/ADAU1761/ADAU1961 codec
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*
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* Copyright 2014 Analog Devices Inc.
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* Author: Lars-Peter Clausen <lars@metafoo.de>
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*
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* Licensed under the GPL-2.
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*/
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#include <linux/mod_devicetable.h>
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#include <linux/module.h>
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#include <linux/regmap.h>
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#include <linux/spi/spi.h>
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#include <sound/soc.h>
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#include "adau1761.h"
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static void adau1761_spi_switch_mode(struct device *dev)
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{
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struct spi_device *spi = to_spi_device(dev);
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/*
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* To get the device into SPI mode CLATCH has to be pulled low three
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* times. Do this by issuing three dummy reads.
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*/
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spi_w8r8(spi, 0x00);
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spi_w8r8(spi, 0x00);
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spi_w8r8(spi, 0x00);
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}
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static int adau1761_spi_probe(struct spi_device *spi)
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{
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const struct spi_device_id *id = spi_get_device_id(spi);
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struct regmap_config config;
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if (!id)
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return -EINVAL;
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config = adau1761_regmap_config;
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config.val_bits = 8;
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config.reg_bits = 24;
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config.read_flag_mask = 0x1;
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return adau1761_probe(&spi->dev,
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devm_regmap_init_spi(spi, &config),
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id->driver_data, adau1761_spi_switch_mode);
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}
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static int adau1761_spi_remove(struct spi_device *spi)
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{
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adau17x1_remove(&spi->dev);
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return 0;
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}
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static const struct spi_device_id adau1761_spi_id[] = {
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{ "adau1361", ADAU1361 },
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{ "adau1461", ADAU1761 },
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{ "adau1761", ADAU1761 },
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{ "adau1961", ADAU1361 },
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{ }
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};
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MODULE_DEVICE_TABLE(spi, adau1761_spi_id);
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#if defined(CONFIG_OF)
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static const struct of_device_id adau1761_spi_dt_ids[] = {
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{ .compatible = "adi,adau1361", },
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{ .compatible = "adi,adau1461", },
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{ .compatible = "adi,adau1761", },
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{ .compatible = "adi,adau1961", },
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{ },
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};
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MODULE_DEVICE_TABLE(of, adau1761_spi_dt_ids);
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#endif
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static struct spi_driver adau1761_spi_driver = {
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.driver = {
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.name = "adau1761",
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.of_match_table = of_match_ptr(adau1761_spi_dt_ids),
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},
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.probe = adau1761_spi_probe,
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.remove = adau1761_spi_remove,
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.id_table = adau1761_spi_id,
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};
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module_spi_driver(adau1761_spi_driver);
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MODULE_DESCRIPTION("ASoC ADAU1361/ADAU1461/ADAU1761/ADAU1961 CODEC SPI driver");
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MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
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MODULE_LICENSE("GPL");
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