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f7e8bbb820
Patch from Deepak Saxena Other than interrupt masking purposes, this API is only used when configuring interrupt lines and this patch moves that functionality directly into the ixp4xx_set_irq_type() implementation as board level PCI code should not need to worry about those details. Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
64 lines
1.5 KiB
C
64 lines
1.5 KiB
C
/*
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* arch/arch/mach-ixp4xx/ixdpg425-pci.c
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*
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* PCI setup routines for Intel IXDPG425 Platform
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*
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* Copyright (C) 2004 MontaVista Softwrae, Inc.
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*
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* Maintainer: Deepak Saxena <dsaxena@plexity.net>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <asm/mach-types.h>
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#include <asm/hardware.h>
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#include <asm/irq.h>
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#include <asm/mach/pci.h>
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extern void ixp4xx_pci_preinit(void);
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extern int ixp4xx_setup(int nr, struct pci_sys_data *sys);
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extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys);
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void __init ixdpg425_pci_preinit(void)
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{
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set_irq_type(IRQ_IXP4XX_GPIO6, IRQT_LOW);
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set_irq_type(IRQ_IXP4XX_GPIO7, IRQT_LOW);
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ixp4xx_pci_preinit();
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}
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static int __init ixdpg425_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
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{
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if (slot == 12 || slot == 13)
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return IRQ_IXP4XX_GPIO7;
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else if (slot == 14)
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return IRQ_IXP4XX_GPIO6;
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else return -1;
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}
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struct hw_pci ixdpg425_pci __initdata = {
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.nr_controllers = 1,
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.preinit = ixdpg425_pci_preinit,
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.swizzle = pci_std_swizzle,
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.setup = ixp4xx_setup,
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.scan = ixp4xx_scan_bus,
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.map_irq = ixdpg425_map_irq,
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};
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int __init ixdpg425_pci_init(void)
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{
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if (machine_is_ixdpg425())
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pci_common_init(&ixdpg425_pci);
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return 0;
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}
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subsys_initcall(ixdpg425_pci_init);
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