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https://github.com/edk2-porting/linux-next.git
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119f517362
This patch adds an initial DRM driver for the Mediatek MT8173 DISP subsystem. It currently supports two fixed output streams from the OVL0/OVL1 sources to the DSI0/DPI0 sinks, respectively. Signed-off-by: CK Hu <ck.hu@mediatek.com> Signed-off-by: YT Shen <yt.shen@mediatek.com> Signed-off-by: Daniel Kurtz <djkurtz@chromium.org> Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com> Signed-off-by: Mao Huang <littlecvr@chromium.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
226 lines
5.9 KiB
C
226 lines
5.9 KiB
C
/*
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* Copyright (c) 2015 MediaTek Inc.
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* Authors:
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* YT Shen <yt.shen@mediatek.com>
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* CK Hu <ck.hu@mediatek.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/clk.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <drm/drmP.h>
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#include "mtk_drm_drv.h"
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#include "mtk_drm_plane.h"
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#include "mtk_drm_ddp_comp.h"
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#define DISP_OD_EN 0x0000
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#define DISP_OD_INTEN 0x0008
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#define DISP_OD_INTSTA 0x000c
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#define DISP_OD_CFG 0x0020
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#define DISP_OD_SIZE 0x0030
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#define DISP_REG_UFO_START 0x0000
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#define DISP_COLOR_CFG_MAIN 0x0400
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#define DISP_COLOR_START 0x0c00
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#define DISP_COLOR_WIDTH 0x0c50
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#define DISP_COLOR_HEIGHT 0x0c54
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#define OD_RELAY_MODE BIT(0)
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#define UFO_BYPASS BIT(2)
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#define COLOR_BYPASS_ALL BIT(7)
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#define COLOR_SEQ_SEL BIT(13)
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static void mtk_color_config(struct mtk_ddp_comp *comp, unsigned int w,
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unsigned int h, unsigned int vrefresh)
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{
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writel(w, comp->regs + DISP_COLOR_WIDTH);
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writel(h, comp->regs + DISP_COLOR_HEIGHT);
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}
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static void mtk_color_start(struct mtk_ddp_comp *comp)
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{
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writel(COLOR_BYPASS_ALL | COLOR_SEQ_SEL,
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comp->regs + DISP_COLOR_CFG_MAIN);
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writel(0x1, comp->regs + DISP_COLOR_START);
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}
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static void mtk_od_config(struct mtk_ddp_comp *comp, unsigned int w,
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unsigned int h, unsigned int vrefresh)
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{
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writel(w << 16 | h, comp->regs + DISP_OD_SIZE);
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}
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static void mtk_od_start(struct mtk_ddp_comp *comp)
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{
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writel(OD_RELAY_MODE, comp->regs + DISP_OD_CFG);
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writel(1, comp->regs + DISP_OD_EN);
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}
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static void mtk_ufoe_start(struct mtk_ddp_comp *comp)
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{
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writel(UFO_BYPASS, comp->regs + DISP_REG_UFO_START);
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}
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static const struct mtk_ddp_comp_funcs ddp_color = {
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.config = mtk_color_config,
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.start = mtk_color_start,
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};
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static const struct mtk_ddp_comp_funcs ddp_od = {
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.config = mtk_od_config,
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.start = mtk_od_start,
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};
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static const struct mtk_ddp_comp_funcs ddp_ufoe = {
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.start = mtk_ufoe_start,
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};
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static const char * const mtk_ddp_comp_stem[MTK_DDP_COMP_TYPE_MAX] = {
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[MTK_DISP_OVL] = "ovl",
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[MTK_DISP_RDMA] = "rdma",
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[MTK_DISP_WDMA] = "wdma",
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[MTK_DISP_COLOR] = "color",
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[MTK_DISP_AAL] = "aal",
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[MTK_DISP_GAMMA] = "gamma",
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[MTK_DISP_UFOE] = "ufoe",
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[MTK_DSI] = "dsi",
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[MTK_DPI] = "dpi",
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[MTK_DISP_PWM] = "pwm",
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[MTK_DISP_MUTEX] = "mutex",
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[MTK_DISP_OD] = "od",
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};
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struct mtk_ddp_comp_match {
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enum mtk_ddp_comp_type type;
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int alias_id;
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const struct mtk_ddp_comp_funcs *funcs;
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};
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static const struct mtk_ddp_comp_match mtk_ddp_matches[DDP_COMPONENT_ID_MAX] = {
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[DDP_COMPONENT_AAL] = { MTK_DISP_AAL, 0, NULL },
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[DDP_COMPONENT_COLOR0] = { MTK_DISP_COLOR, 0, &ddp_color },
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[DDP_COMPONENT_COLOR1] = { MTK_DISP_COLOR, 1, &ddp_color },
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[DDP_COMPONENT_DPI0] = { MTK_DPI, 0, NULL },
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[DDP_COMPONENT_DSI0] = { MTK_DSI, 0, NULL },
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[DDP_COMPONENT_DSI1] = { MTK_DSI, 1, NULL },
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[DDP_COMPONENT_GAMMA] = { MTK_DISP_GAMMA, 0, NULL },
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[DDP_COMPONENT_OD] = { MTK_DISP_OD, 0, &ddp_od },
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[DDP_COMPONENT_OVL0] = { MTK_DISP_OVL, 0, NULL },
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[DDP_COMPONENT_OVL1] = { MTK_DISP_OVL, 1, NULL },
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[DDP_COMPONENT_PWM0] = { MTK_DISP_PWM, 0, NULL },
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[DDP_COMPONENT_RDMA0] = { MTK_DISP_RDMA, 0, NULL },
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[DDP_COMPONENT_RDMA1] = { MTK_DISP_RDMA, 1, NULL },
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[DDP_COMPONENT_RDMA2] = { MTK_DISP_RDMA, 2, NULL },
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[DDP_COMPONENT_UFOE] = { MTK_DISP_UFOE, 0, &ddp_ufoe },
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[DDP_COMPONENT_WDMA0] = { MTK_DISP_WDMA, 0, NULL },
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[DDP_COMPONENT_WDMA1] = { MTK_DISP_WDMA, 1, NULL },
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};
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int mtk_ddp_comp_get_id(struct device_node *node,
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enum mtk_ddp_comp_type comp_type)
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{
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int id = of_alias_get_id(node, mtk_ddp_comp_stem[comp_type]);
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int i;
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for (i = 0; i < ARRAY_SIZE(mtk_ddp_matches); i++) {
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if (comp_type == mtk_ddp_matches[i].type &&
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(id < 0 || id == mtk_ddp_matches[i].alias_id))
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return i;
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}
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return -EINVAL;
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}
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int mtk_ddp_comp_init(struct device *dev, struct device_node *node,
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struct mtk_ddp_comp *comp, enum mtk_ddp_comp_id comp_id,
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const struct mtk_ddp_comp_funcs *funcs)
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{
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enum mtk_ddp_comp_type type;
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struct device_node *larb_node;
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struct platform_device *larb_pdev;
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if (comp_id < 0 || comp_id >= DDP_COMPONENT_ID_MAX)
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return -EINVAL;
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comp->id = comp_id;
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comp->funcs = funcs ?: mtk_ddp_matches[comp_id].funcs;
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if (comp_id == DDP_COMPONENT_DPI0 ||
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comp_id == DDP_COMPONENT_DSI0 ||
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comp_id == DDP_COMPONENT_PWM0) {
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comp->regs = NULL;
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comp->clk = NULL;
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comp->irq = 0;
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return 0;
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}
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comp->regs = of_iomap(node, 0);
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comp->irq = of_irq_get(node, 0);
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comp->clk = of_clk_get(node, 0);
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if (IS_ERR(comp->clk))
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comp->clk = NULL;
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type = mtk_ddp_matches[comp_id].type;
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/* Only DMA capable components need the LARB property */
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comp->larb_dev = NULL;
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if (type != MTK_DISP_OVL &&
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type != MTK_DISP_RDMA &&
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type != MTK_DISP_WDMA)
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return 0;
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larb_node = of_parse_phandle(node, "mediatek,larb", 0);
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if (!larb_node) {
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dev_err(dev,
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"Missing mediadek,larb phandle in %s node\n",
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node->full_name);
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return -EINVAL;
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}
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larb_pdev = of_find_device_by_node(larb_node);
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if (!larb_pdev) {
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dev_warn(dev, "Waiting for larb device %s\n",
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larb_node->full_name);
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of_node_put(larb_node);
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return -EPROBE_DEFER;
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}
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of_node_put(larb_node);
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comp->larb_dev = &larb_pdev->dev;
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return 0;
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}
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int mtk_ddp_comp_register(struct drm_device *drm, struct mtk_ddp_comp *comp)
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{
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struct mtk_drm_private *private = drm->dev_private;
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if (private->ddp_comp[comp->id])
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return -EBUSY;
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private->ddp_comp[comp->id] = comp;
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return 0;
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}
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void mtk_ddp_comp_unregister(struct drm_device *drm, struct mtk_ddp_comp *comp)
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{
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struct mtk_drm_private *private = drm->dev_private;
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private->ddp_comp[comp->id] = NULL;
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}
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