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3dc6475c0c
This patch adds support for the Broadcom BCM6345 SoC Ethernet. BCM6345
has a slightly different and older DMA engine which requires the
following modifications:
- the width of the DMA channels on BCM6345 is 64 bytes vs 16 bytes,
which means that the helpers enet_dma{c,s} need to account for this
channel width and we can no longer use macros
- BCM6345 DMA engine does not have any internal SRAM for transfering
buffers
- BCM6345 buffer allocation and flow control is not per-channel but
global (done in RSET_ENETDMA)
- the DMA engine bits are right-shifted by 3 compared to other DMA
generations
- the DMA enable/interrupt masks are a little different (we need to
enabled more bits for 6345)
- some register have the same meaning but are offsetted in the ENET_DMAC
space so a lookup table is required to return the proper offset
The MAC itself is identical and requires no modifications to work.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
316 lines
7.8 KiB
C
316 lines
7.8 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <linux/export.h>
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#include <bcm63xx_dev_enet.h>
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#include <bcm63xx_io.h>
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#include <bcm63xx_regs.h>
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#ifdef BCMCPU_RUNTIME_DETECT
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static const unsigned long bcm6348_regs_enetdmac[] = {
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[ENETDMAC_CHANCFG] = ENETDMAC_CHANCFG_REG,
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[ENETDMAC_IR] = ENETDMAC_IR_REG,
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[ENETDMAC_IRMASK] = ENETDMAC_IRMASK_REG,
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[ENETDMAC_MAXBURST] = ENETDMAC_MAXBURST_REG,
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};
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static const unsigned long bcm6345_regs_enetdmac[] = {
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[ENETDMAC_CHANCFG] = ENETDMA_6345_CHANCFG_REG,
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[ENETDMAC_IR] = ENETDMA_6345_IR_REG,
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[ENETDMAC_IRMASK] = ENETDMA_6345_IRMASK_REG,
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[ENETDMAC_MAXBURST] = ENETDMA_6345_MAXBURST_REG,
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[ENETDMAC_BUFALLOC] = ENETDMA_6345_BUFALLOC_REG,
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[ENETDMAC_RSTART] = ENETDMA_6345_RSTART_REG,
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[ENETDMAC_FC] = ENETDMA_6345_FC_REG,
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[ENETDMAC_LEN] = ENETDMA_6345_LEN_REG,
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};
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const unsigned long *bcm63xx_regs_enetdmac;
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EXPORT_SYMBOL(bcm63xx_regs_enetdmac);
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static __init void bcm63xx_enetdmac_regs_init(void)
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{
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if (BCMCPU_IS_6345())
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bcm63xx_regs_enetdmac = bcm6345_regs_enetdmac;
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else
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bcm63xx_regs_enetdmac = bcm6348_regs_enetdmac;
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}
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#else
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static __init void bcm63xx_enetdmac_regs_init(void) { }
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#endif
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static struct resource shared_res[] = {
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{
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.start = -1, /* filled at runtime */
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.end = -1, /* filled at runtime */
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.flags = IORESOURCE_MEM,
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},
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{
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.start = -1, /* filled at runtime */
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.end = -1, /* filled at runtime */
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.flags = IORESOURCE_MEM,
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},
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{
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.start = -1, /* filled at runtime */
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.end = -1, /* filled at runtime */
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device bcm63xx_enet_shared_device = {
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.name = "bcm63xx_enet_shared",
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.id = 0,
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.num_resources = ARRAY_SIZE(shared_res),
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.resource = shared_res,
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};
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static int shared_device_registered;
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static struct resource enet0_res[] = {
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{
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.start = -1, /* filled at runtime */
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.end = -1, /* filled at runtime */
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.flags = IORESOURCE_MEM,
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},
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{
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.start = -1, /* filled at runtime */
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = -1, /* filled at runtime */
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = -1, /* filled at runtime */
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct bcm63xx_enet_platform_data enet0_pd;
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static struct platform_device bcm63xx_enet0_device = {
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.name = "bcm63xx_enet",
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.id = 0,
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.num_resources = ARRAY_SIZE(enet0_res),
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.resource = enet0_res,
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.dev = {
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.platform_data = &enet0_pd,
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},
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};
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static struct resource enet1_res[] = {
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{
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.start = -1, /* filled at runtime */
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.end = -1, /* filled at runtime */
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.flags = IORESOURCE_MEM,
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},
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{
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.start = -1, /* filled at runtime */
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = -1, /* filled at runtime */
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = -1, /* filled at runtime */
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct bcm63xx_enet_platform_data enet1_pd;
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static struct platform_device bcm63xx_enet1_device = {
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.name = "bcm63xx_enet",
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.id = 1,
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.num_resources = ARRAY_SIZE(enet1_res),
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.resource = enet1_res,
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.dev = {
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.platform_data = &enet1_pd,
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},
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};
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static struct resource enetsw_res[] = {
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{
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/* start & end filled at runtime */
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.flags = IORESOURCE_MEM,
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},
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{
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/* start filled at runtime */
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.flags = IORESOURCE_IRQ,
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},
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{
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/* start filled at runtime */
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct bcm63xx_enetsw_platform_data enetsw_pd;
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static struct platform_device bcm63xx_enetsw_device = {
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.name = "bcm63xx_enetsw",
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.num_resources = ARRAY_SIZE(enetsw_res),
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.resource = enetsw_res,
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.dev = {
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.platform_data = &enetsw_pd,
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},
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};
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static int __init register_shared(void)
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{
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int ret, chan_count;
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if (shared_device_registered)
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return 0;
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bcm63xx_enetdmac_regs_init();
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shared_res[0].start = bcm63xx_regset_address(RSET_ENETDMA);
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shared_res[0].end = shared_res[0].start;
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if (BCMCPU_IS_6345())
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shared_res[0].end += (RSET_6345_ENETDMA_SIZE) - 1;
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else
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shared_res[0].end += (RSET_ENETDMA_SIZE) - 1;
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if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368())
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chan_count = 32;
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else if (BCMCPU_IS_6345())
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chan_count = 8;
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else
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chan_count = 16;
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shared_res[1].start = bcm63xx_regset_address(RSET_ENETDMAC);
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shared_res[1].end = shared_res[1].start;
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shared_res[1].end += RSET_ENETDMAC_SIZE(chan_count) - 1;
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shared_res[2].start = bcm63xx_regset_address(RSET_ENETDMAS);
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shared_res[2].end = shared_res[2].start;
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shared_res[2].end += RSET_ENETDMAS_SIZE(chan_count) - 1;
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ret = platform_device_register(&bcm63xx_enet_shared_device);
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if (ret)
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return ret;
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shared_device_registered = 1;
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return 0;
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}
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int __init bcm63xx_enet_register(int unit,
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const struct bcm63xx_enet_platform_data *pd)
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{
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struct platform_device *pdev;
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struct bcm63xx_enet_platform_data *dpd;
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int ret;
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if (unit > 1)
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return -ENODEV;
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if (unit == 1 && (BCMCPU_IS_6338() || BCMCPU_IS_6345()))
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return -ENODEV;
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ret = register_shared();
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if (ret)
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return ret;
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if (unit == 0) {
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enet0_res[0].start = bcm63xx_regset_address(RSET_ENET0);
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enet0_res[0].end = enet0_res[0].start;
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enet0_res[0].end += RSET_ENET_SIZE - 1;
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enet0_res[1].start = bcm63xx_get_irq_number(IRQ_ENET0);
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enet0_res[2].start = bcm63xx_get_irq_number(IRQ_ENET0_RXDMA);
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enet0_res[3].start = bcm63xx_get_irq_number(IRQ_ENET0_TXDMA);
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pdev = &bcm63xx_enet0_device;
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} else {
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enet1_res[0].start = bcm63xx_regset_address(RSET_ENET1);
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enet1_res[0].end = enet1_res[0].start;
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enet1_res[0].end += RSET_ENET_SIZE - 1;
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enet1_res[1].start = bcm63xx_get_irq_number(IRQ_ENET1);
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enet1_res[2].start = bcm63xx_get_irq_number(IRQ_ENET1_RXDMA);
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enet1_res[3].start = bcm63xx_get_irq_number(IRQ_ENET1_TXDMA);
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pdev = &bcm63xx_enet1_device;
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}
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/* copy given platform data */
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dpd = pdev->dev.platform_data;
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memcpy(dpd, pd, sizeof(*pd));
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/* adjust them in case internal phy is used */
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if (dpd->use_internal_phy) {
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/* internal phy only exists for enet0 */
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if (unit == 1)
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return -ENODEV;
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dpd->phy_id = 1;
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dpd->has_phy_interrupt = 1;
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dpd->phy_interrupt = bcm63xx_get_irq_number(IRQ_ENET_PHY);
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}
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dpd->dma_chan_en_mask = ENETDMAC_CHANCFG_EN_MASK;
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dpd->dma_chan_int_mask = ENETDMAC_IR_PKTDONE_MASK;
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if (BCMCPU_IS_6345()) {
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dpd->dma_chan_en_mask |= ENETDMAC_CHANCFG_CHAINING_MASK;
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dpd->dma_chan_en_mask |= ENETDMAC_CHANCFG_WRAP_EN_MASK;
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dpd->dma_chan_en_mask |= ENETDMAC_CHANCFG_FLOWC_EN_MASK;
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dpd->dma_chan_int_mask |= ENETDMA_IR_BUFDONE_MASK;
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dpd->dma_chan_int_mask |= ENETDMA_IR_NOTOWNER_MASK;
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dpd->dma_chan_width = ENETDMA_6345_CHAN_WIDTH;
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dpd->dma_desc_shift = ENETDMA_6345_DESC_SHIFT;
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} else {
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dpd->dma_has_sram = true;
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dpd->dma_chan_width = ENETDMA_CHAN_WIDTH;
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}
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ret = platform_device_register(pdev);
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if (ret)
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return ret;
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return 0;
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}
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int __init
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bcm63xx_enetsw_register(const struct bcm63xx_enetsw_platform_data *pd)
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{
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int ret;
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if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368())
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return -ENODEV;
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ret = register_shared();
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if (ret)
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return ret;
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enetsw_res[0].start = bcm63xx_regset_address(RSET_ENETSW);
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enetsw_res[0].end = enetsw_res[0].start;
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enetsw_res[0].end += RSET_ENETSW_SIZE - 1;
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enetsw_res[1].start = bcm63xx_get_irq_number(IRQ_ENETSW_RXDMA0);
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enetsw_res[2].start = bcm63xx_get_irq_number(IRQ_ENETSW_TXDMA0);
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if (!enetsw_res[2].start)
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enetsw_res[2].start = -1;
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memcpy(bcm63xx_enetsw_device.dev.platform_data, pd, sizeof(*pd));
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if (BCMCPU_IS_6328())
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enetsw_pd.num_ports = ENETSW_PORTS_6328;
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else if (BCMCPU_IS_6362() || BCMCPU_IS_6368())
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enetsw_pd.num_ports = ENETSW_PORTS_6368;
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enetsw_pd.dma_has_sram = true;
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enetsw_pd.dma_chan_width = ENETDMA_CHAN_WIDTH;
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enetsw_pd.dma_chan_en_mask = ENETDMAC_CHANCFG_EN_MASK;
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enetsw_pd.dma_chan_int_mask = ENETDMAC_IR_PKTDONE_MASK;
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ret = platform_device_register(&bcm63xx_enetsw_device);
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if (ret)
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return ret;
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return 0;
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}
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