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a8689f65de
This patch adds the iommu bindings for all OMAP2+ SoCs. Apart from the standard bindings used by OMAP peripherals, this patch uses a 'dma-window' (already used by Tegra SMMU) and adds two OMAP custom bindings - 'ti,#tlb-entries' and 'ti,iommu-bus-err-back'. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> [s-anna@ti.com: split bindings document, add dra7 and bus error back] Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
27 lines
876 B
Plaintext
27 lines
876 B
Plaintext
OMAP2+ IOMMU
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Required properties:
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- compatible : Should be one of,
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"ti,omap2-iommu" for OMAP2/OMAP3 IOMMU instances
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"ti,omap4-iommu" for OMAP4/OMAP5 IOMMU instances
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"ti,dra7-iommu" for DRA7xx IOMMU instances
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- ti,hwmods : Name of the hwmod associated with the IOMMU instance
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- reg : Address space for the configuration registers
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- interrupts : Interrupt specifier for the IOMMU instance
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Optional properties:
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- ti,#tlb-entries : Number of entries in the translation look-aside buffer.
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Should be either 8 or 32 (default: 32)
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- ti,iommu-bus-err-back : Indicates the IOMMU instance supports throwing
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back a bus error response on MMU faults.
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Example:
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/* OMAP3 ISP MMU */
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mmu_isp: mmu@480bd400 {
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compatible = "ti,omap2-iommu";
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reg = <0x480bd400 0x80>;
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interrupts = <24>;
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ti,hwmods = "mmu_isp";
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ti,#tlb-entries = <8>;
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};
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