Chad Reese 920cda3870 MIPS: OCTEON: Remove setting of processor specific CVMCTL icache bits. ... CN38XX pass 1 required icache prefetching to be turned off. This chip never reached production and is long dead. Other processor specific icache settings are done by the bootloader. Remove these bits from the kernel. Signed-off-by: Chad Reese <kreese@caviumnetworks.com> Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: David Daney <david.daney@cavium.com> Patchwork: https://patchwork.linux-mips.org/patch/8944/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>		2015-02-20 15:32:22 +01:00
..
asm	MIPS: OCTEON: Remove setting of processor specific CVMCTL icache bits.	2015-02-20 15:32:22 +01:00
uapi/asm	Merge branch 'mipsr6-for-3.20' of git://git.linux-mips.org/pub/scm/mchandras/linux into mips-for-linux-next	2015-02-19 16:00:34 +01:00