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a5a1d1c291
There is no point in having an extra type for extra confusion. u64 is unambiguous. Conversion was done with the following coccinelle script: @rem@ @@ -typedef u64 cycle_t; @fix@ typedef cycle_t; @@ -cycle_t +u64 Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Peter Zijlstra <peterz@infradead.org> Cc: John Stultz <john.stultz@linaro.org>
94 lines
2.7 KiB
C
94 lines
2.7 KiB
C
/*
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* Copyright (C) 2006 Jim Cromie
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*
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* This is a clocksource driver for the Geode SCx200's 1 or 27 MHz
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* high-resolution timer. The Geode SC-1100 (at least) has a buggy
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* time stamp counter (TSC), which loses time unless 'idle=poll' is
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* given as a boot-arg. In its absence, the Generic Timekeeping code
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* will detect and de-rate the bad TSC, allowing this timer to take
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* over timekeeping duties.
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*
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* Based on work by John Stultz, and Ted Phelps (in a 2.6.12-rc6 patch)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*/
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#include <linux/clocksource.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/ioport.h>
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#include <linux/scx200.h>
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#define NAME "scx200_hrt"
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static int mhz27;
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module_param(mhz27, int, 0); /* load time only */
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MODULE_PARM_DESC(mhz27, "count at 27.0 MHz (default is 1.0 MHz)");
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static int ppm;
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module_param(ppm, int, 0); /* load time only */
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MODULE_PARM_DESC(ppm, "+-adjust to actual XO freq (ppm)");
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/* HiRes Timer configuration register address */
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#define SCx200_TMCNFG_OFFSET (SCx200_TIMER_OFFSET + 5)
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/* and config settings */
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#define HR_TMEN (1 << 0) /* timer interrupt enable */
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#define HR_TMCLKSEL (1 << 1) /* 1|0 counts at 27|1 MHz */
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#define HR_TM27MPD (1 << 2) /* 1 turns off input clock (power-down) */
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/* The base timer frequency, * 27 if selected */
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#define HRT_FREQ 1000000
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static u64 read_hrt(struct clocksource *cs)
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{
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/* Read the timer value */
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return (u64) inl(scx200_cb_base + SCx200_TIMER_OFFSET);
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}
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static struct clocksource cs_hrt = {
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.name = "scx200_hrt",
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.rating = 250,
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.read = read_hrt,
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.mask = CLOCKSOURCE_MASK(32),
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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/* mult, shift are set based on mhz27 flag */
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};
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static int __init init_hrt_clocksource(void)
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{
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u32 freq;
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/* Make sure scx200 has initialized the configuration block */
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if (!scx200_cb_present())
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return -ENODEV;
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/* Reserve the timer's ISA io-region for ourselves */
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if (!request_region(scx200_cb_base + SCx200_TIMER_OFFSET,
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SCx200_TIMER_SIZE,
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"NatSemi SCx200 High-Resolution Timer")) {
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pr_warn("unable to lock timer region\n");
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return -ENODEV;
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}
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/* write timer config */
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outb(HR_TMEN | (mhz27 ? HR_TMCLKSEL : 0),
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scx200_cb_base + SCx200_TMCNFG_OFFSET);
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freq = (HRT_FREQ + ppm);
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if (mhz27)
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freq *= 27;
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pr_info("enabling scx200 high-res timer (%s MHz +%d ppm)\n", mhz27 ? "27":"1", ppm);
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return clocksource_register_hz(&cs_hrt, freq);
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}
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module_init(init_hrt_clocksource);
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MODULE_AUTHOR("Jim Cromie <jim.cromie@gmail.com>");
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MODULE_DESCRIPTION("clocksource on SCx200 HiRes Timer");
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MODULE_LICENSE("GPL");
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