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https://github.com/edk2-porting/linux-next.git
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53631b54c8
This patch adds support for FP/ASIMD register bank saving and restoring during context switch and FP exception handling to generate SIGFPE. There are 32 128-bit registers and the context switching is currently done non-lazily. Benchmarks on real hardware are required before implementing lazy FP state saving/restoring. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Nicolas Pitre <nico@linaro.org> Acked-by: Olof Johansson <olof@lixom.net> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
81 lines
2.1 KiB
ArmAsm
81 lines
2.1 KiB
ArmAsm
/*
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* FP/SIMD state saving and restoring
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*
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* Copyright (C) 2012 ARM Ltd.
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* Author: Catalin Marinas <catalin.marinas@arm.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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/*
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* Save the FP registers.
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*
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* x0 - pointer to struct fpsimd_state
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*/
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ENTRY(fpsimd_save_state)
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stp q0, q1, [x0, #16 * 0]
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stp q2, q3, [x0, #16 * 2]
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stp q4, q5, [x0, #16 * 4]
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stp q6, q7, [x0, #16 * 6]
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stp q8, q9, [x0, #16 * 8]
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stp q10, q11, [x0, #16 * 10]
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stp q12, q13, [x0, #16 * 12]
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stp q14, q15, [x0, #16 * 14]
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stp q16, q17, [x0, #16 * 16]
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stp q18, q19, [x0, #16 * 18]
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stp q20, q21, [x0, #16 * 20]
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stp q22, q23, [x0, #16 * 22]
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stp q24, q25, [x0, #16 * 24]
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stp q26, q27, [x0, #16 * 26]
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stp q28, q29, [x0, #16 * 28]
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stp q30, q31, [x0, #16 * 30]!
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mrs x8, fpsr
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str w8, [x0, #16 * 2]
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mrs x8, fpcr
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str w8, [x0, #16 * 2 + 4]
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ret
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ENDPROC(fpsimd_save_state)
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/*
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* Load the FP registers.
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*
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* x0 - pointer to struct fpsimd_state
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*/
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ENTRY(fpsimd_load_state)
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ldp q0, q1, [x0, #16 * 0]
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ldp q2, q3, [x0, #16 * 2]
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ldp q4, q5, [x0, #16 * 4]
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ldp q6, q7, [x0, #16 * 6]
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ldp q8, q9, [x0, #16 * 8]
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ldp q10, q11, [x0, #16 * 10]
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ldp q12, q13, [x0, #16 * 12]
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ldp q14, q15, [x0, #16 * 14]
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ldp q16, q17, [x0, #16 * 16]
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ldp q18, q19, [x0, #16 * 18]
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ldp q20, q21, [x0, #16 * 20]
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ldp q22, q23, [x0, #16 * 22]
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ldp q24, q25, [x0, #16 * 24]
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ldp q26, q27, [x0, #16 * 26]
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ldp q28, q29, [x0, #16 * 28]
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ldp q30, q31, [x0, #16 * 30]!
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ldr w8, [x0, #16 * 2]
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ldr w9, [x0, #16 * 2 + 4]
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msr fpsr, x8
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msr fpcr, x9
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ret
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ENDPROC(fpsimd_load_state)
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