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9139227d4c
Tegra has a blink timer register that allows to modulate the clk_32k clock before outputting it. Since clk_32k is presented to the kernel as a fixed clock, make sure this register does not tamper with the clock frequency and that clk_32k is outputted as-is, similarly to what is done on t20 and t30. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mike Turquette <mturquette@linaro.org> |
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.. | ||
clk-audio-sync.c | ||
clk-divider.c | ||
clk-periph-gate.c | ||
clk-periph.c | ||
clk-pll-out.c | ||
clk-pll.c | ||
clk-super.c | ||
clk-tegra20.c | ||
clk-tegra30.c | ||
clk-tegra114.c | ||
clk.c | ||
clk.h | ||
Makefile |