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linux-next/include/soc
Vladimir Oltean 90e0aa8d10 net: mscc: ocelot: convert the VLAN masks to a list
First and foremost, the driver currently allocates a constant sized
4K * u32 (16KB memory) array for the VLAN masks. However, a typical
application might not need so many VLANs, so if we dynamically allocate
the memory as needed, we might actually save some space.

Secondly, we'll need to keep more advanced bookkeeping of the VLANs we
have, notably we'll have to check how many untagged and how many tagged
VLANs we have. This will have to stay in a structure, and allocating
another 16 KB array for that is again a bit too much.

So refactor the bridge VLANs in a linked list of structures.

The hook points inside the driver are ocelot_vlan_member_add() and
ocelot_vlan_member_del(), which previously used to operate on the
ocelot->vlan_mask[vid] array element.

ocelot_vlan_member_add() and ocelot_vlan_member_del() used to call
ocelot_vlan_member_set() to commit to the ocelot->vlan_mask.
Additionally, we had two calls to ocelot_vlan_member_set() from outside
those callers, and those were directly from ocelot_vlan_init().
Those calls do not set up bridging service VLANs, instead they:

- clear the VLAN table on reset
- set the port pvid to the value used by this driver for VLAN-unaware
  standalone port operation (VID 0)

So now, when we have a structure which represents actual bridge VLANs,
VID 0 doesn't belong in that structure, since it is not part of the
bridging layer.

So delete the middle man, ocelot_vlan_member_set(), and let
ocelot_vlan_init() call directly ocelot_vlant_set_mask() which forgoes
any data structure and writes directly to hardware, which is all that we
need.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-10-21 12:14:29 +01:00
..
arc include/: replace HTTP links with HTTPS ones 2020-08-12 10:57:59 -07:00
at91 ARM: at91: ddr: add registers definitions for sama7g5's ddr 2021-07-19 14:32:12 +02:00
bcm2835 firmware: raspberrypi: Introduce devm_rpi_firmware_get() 2021-03-22 17:59:51 +01:00
canaan clk: Add RISC-V Canaan Kendryte K210 clock driver 2021-02-22 17:51:04 -08:00
fsl soc: fsl: dpio: add Net DIM integration 2021-10-15 14:32:41 +01:00
imx ARM: imx: Initialize SoC ID on i.MX50 2021-05-13 15:42:21 +08:00
mediatek IOMMU Updates for Linux v5.12 2021-02-22 10:31:29 -08:00
microchip mbox: add polarfire soc system controller mailbox 2021-06-26 12:06:48 -05:00
mscc net: mscc: ocelot: convert the VLAN masks to a list 2021-10-21 12:14:29 +01:00
qcom soc: qcom: rpmh: Remove serialization of TCS commands 2021-01-07 10:59:46 -06:00
rockchip treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 288 2019-06-05 17:36:37 +02:00
sa1100 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
sifive riscv: move sifive_l2_cache.h to include/soc 2020-01-12 10:12:44 -08:00
tegra soc/tegra: Changes for v5.15-rc1 2021-08-18 15:23:38 +02:00