mirror of
https://github.com/edk2-porting/linux-next.git
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5a0e3ad6af
percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: Tejun Heo <tj@kernel.org> Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
960 lines
25 KiB
C
960 lines
25 KiB
C
/*
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* sisusb - usb kernel driver for SiS315(E) based USB2VGA dongles
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*
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* Display mode initializing code
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*
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* Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
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*
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* If distributed as part of the Linux kernel, this code is licensed under the
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* terms of the GPL v2.
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*
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* Otherwise, the following license terms apply:
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*
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* * Redistribution and use in source and binary forms, with or without
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* * modification, are permitted provided that the following conditions
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* * are met:
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* * 1) Redistributions of source code must retain the above copyright
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* * notice, this list of conditions and the following disclaimer.
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* * 2) Redistributions in binary form must reproduce the above copyright
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* * notice, this list of conditions and the following disclaimer in the
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* * documentation and/or other materials provided with the distribution.
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* * 3) The name of the author may not be used to endorse or promote products
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* * derived from this software without specific prior written permission.
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* *
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* * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Author: Thomas Winischhofer <thomas@winischhofer.net>
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*
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/poll.h>
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#include <linux/init.h>
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#include <linux/spinlock.h>
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#include "sisusb.h"
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#ifdef INCL_SISUSB_CON
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#include "sisusb_init.h"
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/*********************************************/
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/* POINTER INITIALIZATION */
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/*********************************************/
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static void SiSUSB_InitPtr(struct SiS_Private *SiS_Pr)
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{
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SiS_Pr->SiS_ModeResInfo = SiSUSB_ModeResInfo;
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SiS_Pr->SiS_StandTable = SiSUSB_StandTable;
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SiS_Pr->SiS_SModeIDTable = SiSUSB_SModeIDTable;
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SiS_Pr->SiS_EModeIDTable = SiSUSB_EModeIDTable;
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SiS_Pr->SiS_RefIndex = SiSUSB_RefIndex;
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SiS_Pr->SiS_CRT1Table = SiSUSB_CRT1Table;
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SiS_Pr->SiS_VCLKData = SiSUSB_VCLKData;
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}
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/*********************************************/
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/* HELPER: SetReg, GetReg */
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/*********************************************/
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static void
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SiS_SetReg(struct SiS_Private *SiS_Pr, unsigned long port,
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unsigned short index, unsigned short data)
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{
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sisusb_setidxreg(SiS_Pr->sisusb, port, index, data);
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}
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static void
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SiS_SetRegByte(struct SiS_Private *SiS_Pr, unsigned long port,
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unsigned short data)
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{
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sisusb_setreg(SiS_Pr->sisusb, port, data);
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}
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static unsigned char
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SiS_GetReg(struct SiS_Private *SiS_Pr, unsigned long port, unsigned short index)
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{
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u8 data;
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sisusb_getidxreg(SiS_Pr->sisusb, port, index, &data);
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return data;
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}
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static unsigned char
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SiS_GetRegByte(struct SiS_Private *SiS_Pr, unsigned long port)
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{
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u8 data;
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sisusb_getreg(SiS_Pr->sisusb, port, &data);
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return data;
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}
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static void
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SiS_SetRegANDOR(struct SiS_Private *SiS_Pr, unsigned long port,
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unsigned short index, unsigned short DataAND,
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unsigned short DataOR)
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{
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sisusb_setidxregandor(SiS_Pr->sisusb, port, index, DataAND, DataOR);
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}
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static void
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SiS_SetRegAND(struct SiS_Private *SiS_Pr, unsigned long port,
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unsigned short index, unsigned short DataAND)
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{
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sisusb_setidxregand(SiS_Pr->sisusb, port, index, DataAND);
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}
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static void
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SiS_SetRegOR(struct SiS_Private *SiS_Pr, unsigned long port,
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unsigned short index, unsigned short DataOR)
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{
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sisusb_setidxregor(SiS_Pr->sisusb, port, index, DataOR);
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}
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/*********************************************/
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/* HELPER: DisplayOn, DisplayOff */
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/*********************************************/
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static void SiS_DisplayOn(struct SiS_Private *SiS_Pr)
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{
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SiS_SetRegAND(SiS_Pr, SiS_Pr->SiS_P3c4, 0x01, 0xDF);
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}
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/*********************************************/
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/* HELPER: Init Port Addresses */
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/*********************************************/
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static void SiSUSBRegInit(struct SiS_Private *SiS_Pr, unsigned long BaseAddr)
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{
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SiS_Pr->SiS_P3c4 = BaseAddr + 0x14;
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SiS_Pr->SiS_P3d4 = BaseAddr + 0x24;
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SiS_Pr->SiS_P3c0 = BaseAddr + 0x10;
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SiS_Pr->SiS_P3ce = BaseAddr + 0x1e;
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SiS_Pr->SiS_P3c2 = BaseAddr + 0x12;
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SiS_Pr->SiS_P3ca = BaseAddr + 0x1a;
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SiS_Pr->SiS_P3c6 = BaseAddr + 0x16;
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SiS_Pr->SiS_P3c7 = BaseAddr + 0x17;
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SiS_Pr->SiS_P3c8 = BaseAddr + 0x18;
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SiS_Pr->SiS_P3c9 = BaseAddr + 0x19;
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SiS_Pr->SiS_P3cb = BaseAddr + 0x1b;
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SiS_Pr->SiS_P3cc = BaseAddr + 0x1c;
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SiS_Pr->SiS_P3cd = BaseAddr + 0x1d;
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SiS_Pr->SiS_P3da = BaseAddr + 0x2a;
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SiS_Pr->SiS_Part1Port = BaseAddr + SIS_CRT2_PORT_04;
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}
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/*********************************************/
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/* HELPER: GetSysFlags */
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/*********************************************/
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static void SiS_GetSysFlags(struct SiS_Private *SiS_Pr)
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{
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SiS_Pr->SiS_MyCR63 = 0x63;
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}
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/*********************************************/
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/* HELPER: Init PCI & Engines */
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/*********************************************/
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static void SiSInitPCIetc(struct SiS_Private *SiS_Pr)
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{
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SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, 0x20, 0xa1);
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/* - Enable 2D (0x40)
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* - Enable 3D (0x02)
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* - Enable 3D vertex command fetch (0x10)
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* - Enable 3D command parser (0x08)
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* - Enable 3D G/L transformation engine (0x80)
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*/
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SiS_SetRegOR(SiS_Pr, SiS_Pr->SiS_P3c4, 0x1E, 0xDA);
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}
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/*********************************************/
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/* HELPER: SET SEGMENT REGISTERS */
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/*********************************************/
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static void SiS_SetSegRegLower(struct SiS_Private *SiS_Pr, unsigned short value)
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{
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unsigned short temp;
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value &= 0x00ff;
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temp = SiS_GetRegByte(SiS_Pr, SiS_Pr->SiS_P3cb) & 0xf0;
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temp |= (value >> 4);
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SiS_SetRegByte(SiS_Pr, SiS_Pr->SiS_P3cb, temp);
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temp = SiS_GetRegByte(SiS_Pr, SiS_Pr->SiS_P3cd) & 0xf0;
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temp |= (value & 0x0f);
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SiS_SetRegByte(SiS_Pr, SiS_Pr->SiS_P3cd, temp);
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}
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static void SiS_SetSegRegUpper(struct SiS_Private *SiS_Pr, unsigned short value)
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{
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unsigned short temp;
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value &= 0x00ff;
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temp = SiS_GetRegByte(SiS_Pr, SiS_Pr->SiS_P3cb) & 0x0f;
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temp |= (value & 0xf0);
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SiS_SetRegByte(SiS_Pr, SiS_Pr->SiS_P3cb, temp);
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temp = SiS_GetRegByte(SiS_Pr, SiS_Pr->SiS_P3cd) & 0x0f;
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temp |= (value << 4);
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SiS_SetRegByte(SiS_Pr, SiS_Pr->SiS_P3cd, temp);
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}
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static void SiS_SetSegmentReg(struct SiS_Private *SiS_Pr, unsigned short value)
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{
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SiS_SetSegRegLower(SiS_Pr, value);
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SiS_SetSegRegUpper(SiS_Pr, value);
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}
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static void SiS_ResetSegmentReg(struct SiS_Private *SiS_Pr)
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{
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SiS_SetSegmentReg(SiS_Pr, 0);
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}
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static void
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SiS_SetSegmentRegOver(struct SiS_Private *SiS_Pr, unsigned short value)
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{
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unsigned short temp = value >> 8;
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temp &= 0x07;
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temp |= (temp << 4);
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SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, 0x1d, temp);
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SiS_SetSegmentReg(SiS_Pr, value);
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}
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static void SiS_ResetSegmentRegOver(struct SiS_Private *SiS_Pr)
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{
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SiS_SetSegmentRegOver(SiS_Pr, 0);
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}
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static void SiS_ResetSegmentRegisters(struct SiS_Private *SiS_Pr)
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{
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SiS_ResetSegmentReg(SiS_Pr);
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SiS_ResetSegmentRegOver(SiS_Pr);
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}
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/*********************************************/
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/* HELPER: SearchModeID */
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/*********************************************/
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static int
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SiS_SearchModeID(struct SiS_Private *SiS_Pr, unsigned short *ModeNo,
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unsigned short *ModeIdIndex)
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{
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if ((*ModeNo) <= 0x13) {
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if ((*ModeNo) != 0x03)
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return 0;
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(*ModeIdIndex) = 0;
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} else {
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for (*ModeIdIndex = 0;; (*ModeIdIndex)++) {
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if (SiS_Pr->SiS_EModeIDTable[*ModeIdIndex].Ext_ModeID ==
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(*ModeNo))
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break;
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if (SiS_Pr->SiS_EModeIDTable[*ModeIdIndex].Ext_ModeID ==
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0xFF)
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return 0;
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}
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}
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return 1;
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}
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/*********************************************/
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/* HELPER: ENABLE CRT1 */
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/*********************************************/
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static void SiS_HandleCRT1(struct SiS_Private *SiS_Pr)
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{
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/* Enable CRT1 gating */
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SiS_SetRegAND(SiS_Pr, SiS_Pr->SiS_P3d4, SiS_Pr->SiS_MyCR63, 0xbf);
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}
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/*********************************************/
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/* HELPER: GetColorDepth */
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/*********************************************/
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static unsigned short
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SiS_GetColorDepth(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
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unsigned short ModeIdIndex)
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{
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static const unsigned short ColorDepth[6] = { 1, 2, 4, 4, 6, 8 };
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unsigned short modeflag;
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short index;
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if (ModeNo <= 0x13) {
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modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
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} else {
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modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
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}
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index = (modeflag & ModeTypeMask) - ModeEGA;
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if (index < 0)
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index = 0;
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return ColorDepth[index];
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}
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/*********************************************/
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/* HELPER: GetOffset */
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/*********************************************/
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static unsigned short
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SiS_GetOffset(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
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unsigned short ModeIdIndex, unsigned short rrti)
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{
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unsigned short xres, temp, colordepth, infoflag;
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infoflag = SiS_Pr->SiS_RefIndex[rrti].Ext_InfoFlag;
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xres = SiS_Pr->SiS_RefIndex[rrti].XRes;
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colordepth = SiS_GetColorDepth(SiS_Pr, ModeNo, ModeIdIndex);
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temp = xres / 16;
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if (infoflag & InterlaceMode)
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temp <<= 1;
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temp *= colordepth;
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if (xres % 16)
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temp += (colordepth >> 1);
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return temp;
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}
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/*********************************************/
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/* SEQ */
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/*********************************************/
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static void
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SiS_SetSeqRegs(struct SiS_Private *SiS_Pr, unsigned short StandTableIndex)
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{
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unsigned char SRdata;
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int i;
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SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, 0x00, 0x03);
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SRdata = SiS_Pr->SiS_StandTable[StandTableIndex].SR[0] | 0x20;
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SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, 0x01, SRdata);
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for (i = 2; i <= 4; i++) {
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SRdata = SiS_Pr->SiS_StandTable[StandTableIndex].SR[i - 1];
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SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, i, SRdata);
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}
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}
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/*********************************************/
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/* MISC */
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/*********************************************/
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static void
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SiS_SetMiscRegs(struct SiS_Private *SiS_Pr, unsigned short StandTableIndex)
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{
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unsigned char Miscdata = SiS_Pr->SiS_StandTable[StandTableIndex].MISC;
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SiS_SetRegByte(SiS_Pr, SiS_Pr->SiS_P3c2, Miscdata);
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}
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/*********************************************/
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/* CRTC */
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/*********************************************/
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static void
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SiS_SetCRTCRegs(struct SiS_Private *SiS_Pr, unsigned short StandTableIndex)
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{
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unsigned char CRTCdata;
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unsigned short i;
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SiS_SetRegAND(SiS_Pr, SiS_Pr->SiS_P3d4, 0x11, 0x7f);
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for (i = 0; i <= 0x18; i++) {
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CRTCdata = SiS_Pr->SiS_StandTable[StandTableIndex].CRTC[i];
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SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3d4, i, CRTCdata);
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}
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}
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/*********************************************/
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/* ATT */
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/*********************************************/
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static void
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SiS_SetATTRegs(struct SiS_Private *SiS_Pr, unsigned short StandTableIndex)
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{
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unsigned char ARdata;
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unsigned short i;
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for (i = 0; i <= 0x13; i++) {
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ARdata = SiS_Pr->SiS_StandTable[StandTableIndex].ATTR[i];
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SiS_GetRegByte(SiS_Pr, SiS_Pr->SiS_P3da);
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SiS_SetRegByte(SiS_Pr, SiS_Pr->SiS_P3c0, i);
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SiS_SetRegByte(SiS_Pr, SiS_Pr->SiS_P3c0, ARdata);
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}
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SiS_GetRegByte(SiS_Pr, SiS_Pr->SiS_P3da);
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SiS_SetRegByte(SiS_Pr, SiS_Pr->SiS_P3c0, 0x14);
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SiS_SetRegByte(SiS_Pr, SiS_Pr->SiS_P3c0, 0x00);
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SiS_GetRegByte(SiS_Pr, SiS_Pr->SiS_P3da);
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SiS_SetRegByte(SiS_Pr, SiS_Pr->SiS_P3c0, 0x20);
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SiS_GetRegByte(SiS_Pr, SiS_Pr->SiS_P3da);
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}
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/*********************************************/
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/* GRC */
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/*********************************************/
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static void
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SiS_SetGRCRegs(struct SiS_Private *SiS_Pr, unsigned short StandTableIndex)
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{
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unsigned char GRdata;
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unsigned short i;
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for (i = 0; i <= 0x08; i++) {
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GRdata = SiS_Pr->SiS_StandTable[StandTableIndex].GRC[i];
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SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3ce, i, GRdata);
|
|
}
|
|
|
|
if (SiS_Pr->SiS_ModeType > ModeVGA) {
|
|
/* 256 color disable */
|
|
SiS_SetRegAND(SiS_Pr, SiS_Pr->SiS_P3ce, 0x05, 0xBF);
|
|
}
|
|
}
|
|
|
|
/*********************************************/
|
|
/* CLEAR EXTENDED REGISTERS */
|
|
/*********************************************/
|
|
|
|
static void SiS_ClearExt1Regs(struct SiS_Private *SiS_Pr, unsigned short ModeNo)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0x0A; i <= 0x0E; i++) {
|
|
SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, i, 0x00);
|
|
}
|
|
|
|
SiS_SetRegAND(SiS_Pr, SiS_Pr->SiS_P3c4, 0x37, 0xFE);
|
|
}
|
|
|
|
/*********************************************/
|
|
/* Get rate index */
|
|
/*********************************************/
|
|
|
|
static unsigned short
|
|
SiS_GetRatePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
|
|
unsigned short ModeIdIndex)
|
|
{
|
|
unsigned short rrti, i, index, temp;
|
|
|
|
if (ModeNo <= 0x13)
|
|
return 0xFFFF;
|
|
|
|
index = SiS_GetReg(SiS_Pr, SiS_Pr->SiS_P3d4, 0x33) & 0x0F;
|
|
if (index > 0)
|
|
index--;
|
|
|
|
rrti = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].REFindex;
|
|
ModeNo = SiS_Pr->SiS_RefIndex[rrti].ModeID;
|
|
|
|
i = 0;
|
|
do {
|
|
if (SiS_Pr->SiS_RefIndex[rrti + i].ModeID != ModeNo)
|
|
break;
|
|
|
|
temp =
|
|
SiS_Pr->SiS_RefIndex[rrti + i].Ext_InfoFlag & ModeTypeMask;
|
|
if (temp < SiS_Pr->SiS_ModeType)
|
|
break;
|
|
|
|
i++;
|
|
index--;
|
|
} while (index != 0xFFFF);
|
|
|
|
i--;
|
|
|
|
return (rrti + i);
|
|
}
|
|
|
|
/*********************************************/
|
|
/* SYNC */
|
|
/*********************************************/
|
|
|
|
static void SiS_SetCRT1Sync(struct SiS_Private *SiS_Pr, unsigned short rrti)
|
|
{
|
|
unsigned short sync = SiS_Pr->SiS_RefIndex[rrti].Ext_InfoFlag >> 8;
|
|
sync &= 0xC0;
|
|
sync |= 0x2f;
|
|
SiS_SetRegByte(SiS_Pr, SiS_Pr->SiS_P3c2, sync);
|
|
}
|
|
|
|
/*********************************************/
|
|
/* CRTC/2 */
|
|
/*********************************************/
|
|
|
|
static void
|
|
SiS_SetCRT1CRTC(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
|
|
unsigned short ModeIdIndex, unsigned short rrti)
|
|
{
|
|
unsigned char index;
|
|
unsigned short temp, i, j, modeflag;
|
|
|
|
SiS_SetRegAND(SiS_Pr, SiS_Pr->SiS_P3d4, 0x11, 0x7f);
|
|
|
|
modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
|
|
|
|
index = SiS_Pr->SiS_RefIndex[rrti].Ext_CRT1CRTC;
|
|
|
|
for (i = 0, j = 0; i <= 7; i++, j++) {
|
|
SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3d4, j,
|
|
SiS_Pr->SiS_CRT1Table[index].CR[i]);
|
|
}
|
|
for (j = 0x10; i <= 10; i++, j++) {
|
|
SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3d4, j,
|
|
SiS_Pr->SiS_CRT1Table[index].CR[i]);
|
|
}
|
|
for (j = 0x15; i <= 12; i++, j++) {
|
|
SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3d4, j,
|
|
SiS_Pr->SiS_CRT1Table[index].CR[i]);
|
|
}
|
|
for (j = 0x0A; i <= 15; i++, j++) {
|
|
SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, j,
|
|
SiS_Pr->SiS_CRT1Table[index].CR[i]);
|
|
}
|
|
|
|
temp = SiS_Pr->SiS_CRT1Table[index].CR[16] & 0xE0;
|
|
SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, 0x0E, temp);
|
|
|
|
temp = ((SiS_Pr->SiS_CRT1Table[index].CR[16]) & 0x01) << 5;
|
|
if (modeflag & DoubleScanMode)
|
|
temp |= 0x80;
|
|
SiS_SetRegANDOR(SiS_Pr, SiS_Pr->SiS_P3d4, 0x09, 0x5F, temp);
|
|
|
|
if (SiS_Pr->SiS_ModeType > ModeVGA)
|
|
SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3d4, 0x14, 0x4F);
|
|
}
|
|
|
|
/*********************************************/
|
|
/* OFFSET & PITCH */
|
|
/*********************************************/
|
|
/* (partly overruled by SetPitch() in XF86) */
|
|
/*********************************************/
|
|
|
|
static void
|
|
SiS_SetCRT1Offset(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
|
|
unsigned short ModeIdIndex, unsigned short rrti)
|
|
{
|
|
unsigned short du = SiS_GetOffset(SiS_Pr, ModeNo, ModeIdIndex, rrti);
|
|
unsigned short infoflag = SiS_Pr->SiS_RefIndex[rrti].Ext_InfoFlag;
|
|
unsigned short temp;
|
|
|
|
temp = (du >> 8) & 0x0f;
|
|
SiS_SetRegANDOR(SiS_Pr, SiS_Pr->SiS_P3c4, 0x0E, 0xF0, temp);
|
|
|
|
SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3d4, 0x13, (du & 0xFF));
|
|
|
|
if (infoflag & InterlaceMode)
|
|
du >>= 1;
|
|
|
|
du <<= 5;
|
|
temp = (du >> 8) & 0xff;
|
|
if (du & 0xff)
|
|
temp++;
|
|
temp++;
|
|
SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, 0x10, temp);
|
|
}
|
|
|
|
/*********************************************/
|
|
/* VCLK */
|
|
/*********************************************/
|
|
|
|
static void
|
|
SiS_SetCRT1VCLK(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
|
|
unsigned short rrti)
|
|
{
|
|
unsigned short index = SiS_Pr->SiS_RefIndex[rrti].Ext_CRTVCLK;
|
|
unsigned short clka = SiS_Pr->SiS_VCLKData[index].SR2B;
|
|
unsigned short clkb = SiS_Pr->SiS_VCLKData[index].SR2C;
|
|
|
|
SiS_SetRegAND(SiS_Pr, SiS_Pr->SiS_P3c4, 0x31, 0xCF);
|
|
|
|
SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, 0x2B, clka);
|
|
SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, 0x2C, clkb);
|
|
SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, 0x2D, 0x01);
|
|
}
|
|
|
|
/*********************************************/
|
|
/* FIFO */
|
|
/*********************************************/
|
|
|
|
static void
|
|
SiS_SetCRT1FIFO_310(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
|
|
unsigned short mi)
|
|
{
|
|
unsigned short modeflag = SiS_Pr->SiS_EModeIDTable[mi].Ext_ModeFlag;
|
|
|
|
/* disable auto-threshold */
|
|
SiS_SetRegAND(SiS_Pr, SiS_Pr->SiS_P3c4, 0x3D, 0xFE);
|
|
|
|
SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, 0x08, 0xAE);
|
|
SiS_SetRegAND(SiS_Pr, SiS_Pr->SiS_P3c4, 0x09, 0xF0);
|
|
|
|
if (ModeNo <= 0x13)
|
|
return;
|
|
|
|
if ((!(modeflag & DoubleScanMode)) || (!(modeflag & HalfDCLK))) {
|
|
SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, 0x08, 0x34);
|
|
SiS_SetRegOR(SiS_Pr, SiS_Pr->SiS_P3c4, 0x3D, 0x01);
|
|
}
|
|
}
|
|
|
|
/*********************************************/
|
|
/* MODE REGISTERS */
|
|
/*********************************************/
|
|
|
|
static void
|
|
SiS_SetVCLKState(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
|
|
unsigned short rrti)
|
|
{
|
|
unsigned short data = 0, VCLK = 0, index = 0;
|
|
|
|
if (ModeNo > 0x13) {
|
|
index = SiS_Pr->SiS_RefIndex[rrti].Ext_CRTVCLK;
|
|
VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK;
|
|
}
|
|
|
|
if (VCLK >= 166)
|
|
data |= 0x0c;
|
|
SiS_SetRegANDOR(SiS_Pr, SiS_Pr->SiS_P3c4, 0x32, 0xf3, data);
|
|
|
|
if (VCLK >= 166)
|
|
SiS_SetRegAND(SiS_Pr, SiS_Pr->SiS_P3c4, 0x1f, 0xe7);
|
|
|
|
/* DAC speed */
|
|
data = 0x03;
|
|
if (VCLK >= 260)
|
|
data = 0x00;
|
|
else if (VCLK >= 160)
|
|
data = 0x01;
|
|
else if (VCLK >= 135)
|
|
data = 0x02;
|
|
|
|
SiS_SetRegANDOR(SiS_Pr, SiS_Pr->SiS_P3c4, 0x07, 0xF8, data);
|
|
}
|
|
|
|
static void
|
|
SiS_SetCRT1ModeRegs(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
|
|
unsigned short ModeIdIndex, unsigned short rrti)
|
|
{
|
|
unsigned short data, infoflag = 0, modeflag;
|
|
|
|
if (ModeNo <= 0x13)
|
|
modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
|
|
else {
|
|
modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
|
|
infoflag = SiS_Pr->SiS_RefIndex[rrti].Ext_InfoFlag;
|
|
}
|
|
|
|
/* Disable DPMS */
|
|
SiS_SetRegAND(SiS_Pr, SiS_Pr->SiS_P3c4, 0x1F, 0x3F);
|
|
|
|
data = 0;
|
|
if (ModeNo > 0x13) {
|
|
if (SiS_Pr->SiS_ModeType > ModeEGA) {
|
|
data |= 0x02;
|
|
data |= ((SiS_Pr->SiS_ModeType - ModeVGA) << 2);
|
|
}
|
|
if (infoflag & InterlaceMode)
|
|
data |= 0x20;
|
|
}
|
|
SiS_SetRegANDOR(SiS_Pr, SiS_Pr->SiS_P3c4, 0x06, 0xC0, data);
|
|
|
|
data = 0;
|
|
if (infoflag & InterlaceMode) {
|
|
/* data = (Hsync / 8) - ((Htotal / 8) / 2) + 3 */
|
|
unsigned short hrs =
|
|
(SiS_GetReg(SiS_Pr, SiS_Pr->SiS_P3d4, 0x04) |
|
|
((SiS_GetReg(SiS_Pr, SiS_Pr->SiS_P3c4, 0x0b) & 0xc0) << 2))
|
|
- 3;
|
|
unsigned short hto =
|
|
(SiS_GetReg(SiS_Pr, SiS_Pr->SiS_P3d4, 0x00) |
|
|
((SiS_GetReg(SiS_Pr, SiS_Pr->SiS_P3c4, 0x0b) & 0x03) << 8))
|
|
+ 5;
|
|
data = hrs - (hto >> 1) + 3;
|
|
}
|
|
SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3d4, 0x19, (data & 0xFF));
|
|
SiS_SetRegANDOR(SiS_Pr, SiS_Pr->SiS_P3d4, 0x1a, 0xFC, (data >> 8));
|
|
|
|
if (modeflag & HalfDCLK)
|
|
SiS_SetRegOR(SiS_Pr, SiS_Pr->SiS_P3c4, 0x01, 0x08);
|
|
|
|
data = 0;
|
|
if (modeflag & LineCompareOff)
|
|
data = 0x08;
|
|
SiS_SetRegANDOR(SiS_Pr, SiS_Pr->SiS_P3c4, 0x0F, 0xB7, data);
|
|
|
|
if ((SiS_Pr->SiS_ModeType == ModeEGA) && (ModeNo > 0x13))
|
|
SiS_SetRegOR(SiS_Pr, SiS_Pr->SiS_P3c4, 0x0F, 0x40);
|
|
|
|
SiS_SetRegAND(SiS_Pr, SiS_Pr->SiS_P3c4, 0x31, 0xfb);
|
|
|
|
data = 0x60;
|
|
if (SiS_Pr->SiS_ModeType != ModeText) {
|
|
data ^= 0x60;
|
|
if (SiS_Pr->SiS_ModeType != ModeEGA)
|
|
data ^= 0xA0;
|
|
}
|
|
SiS_SetRegANDOR(SiS_Pr, SiS_Pr->SiS_P3c4, 0x21, 0x1F, data);
|
|
|
|
SiS_SetVCLKState(SiS_Pr, ModeNo, rrti);
|
|
|
|
if (SiS_GetReg(SiS_Pr, SiS_Pr->SiS_P3d4, 0x31) & 0x40)
|
|
SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3d4, 0x52, 0x2c);
|
|
else
|
|
SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3d4, 0x52, 0x6c);
|
|
}
|
|
|
|
/*********************************************/
|
|
/* LOAD DAC */
|
|
/*********************************************/
|
|
|
|
static void
|
|
SiS_WriteDAC(struct SiS_Private *SiS_Pr, unsigned long DACData,
|
|
unsigned short shiftflag, unsigned short dl, unsigned short ah,
|
|
unsigned short al, unsigned short dh)
|
|
{
|
|
unsigned short d1, d2, d3;
|
|
|
|
switch (dl) {
|
|
case 0:
|
|
d1 = dh;
|
|
d2 = ah;
|
|
d3 = al;
|
|
break;
|
|
case 1:
|
|
d1 = ah;
|
|
d2 = al;
|
|
d3 = dh;
|
|
break;
|
|
default:
|
|
d1 = al;
|
|
d2 = dh;
|
|
d3 = ah;
|
|
}
|
|
SiS_SetRegByte(SiS_Pr, DACData, (d1 << shiftflag));
|
|
SiS_SetRegByte(SiS_Pr, DACData, (d2 << shiftflag));
|
|
SiS_SetRegByte(SiS_Pr, DACData, (d3 << shiftflag));
|
|
}
|
|
|
|
static void
|
|
SiS_LoadDAC(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
|
|
unsigned short mi)
|
|
{
|
|
unsigned short data, data2, time, i, j, k, m, n, o;
|
|
unsigned short si, di, bx, sf;
|
|
unsigned long DACAddr, DACData;
|
|
const unsigned char *table = NULL;
|
|
|
|
if (ModeNo < 0x13)
|
|
data = SiS_Pr->SiS_SModeIDTable[mi].St_ModeFlag;
|
|
else
|
|
data = SiS_Pr->SiS_EModeIDTable[mi].Ext_ModeFlag;
|
|
|
|
data &= DACInfoFlag;
|
|
|
|
j = time = 64;
|
|
if (data == 0x00)
|
|
table = SiS_MDA_DAC;
|
|
else if (data == 0x08)
|
|
table = SiS_CGA_DAC;
|
|
else if (data == 0x10)
|
|
table = SiS_EGA_DAC;
|
|
else {
|
|
j = 16;
|
|
time = 256;
|
|
table = SiS_VGA_DAC;
|
|
}
|
|
|
|
DACAddr = SiS_Pr->SiS_P3c8;
|
|
DACData = SiS_Pr->SiS_P3c9;
|
|
sf = 0;
|
|
SiS_SetRegByte(SiS_Pr, SiS_Pr->SiS_P3c6, 0xFF);
|
|
|
|
SiS_SetRegByte(SiS_Pr, DACAddr, 0x00);
|
|
|
|
for (i = 0; i < j; i++) {
|
|
data = table[i];
|
|
for (k = 0; k < 3; k++) {
|
|
data2 = 0;
|
|
if (data & 0x01)
|
|
data2 += 0x2A;
|
|
if (data & 0x02)
|
|
data2 += 0x15;
|
|
SiS_SetRegByte(SiS_Pr, DACData, (data2 << sf));
|
|
data >>= 2;
|
|
}
|
|
}
|
|
|
|
if (time == 256) {
|
|
for (i = 16; i < 32; i++) {
|
|
data = table[i] << sf;
|
|
for (k = 0; k < 3; k++)
|
|
SiS_SetRegByte(SiS_Pr, DACData, data);
|
|
}
|
|
si = 32;
|
|
for (m = 0; m < 9; m++) {
|
|
di = si;
|
|
bx = si + 4;
|
|
for (n = 0; n < 3; n++) {
|
|
for (o = 0; o < 5; o++) {
|
|
SiS_WriteDAC(SiS_Pr, DACData, sf, n,
|
|
table[di], table[bx],
|
|
table[si]);
|
|
si++;
|
|
}
|
|
si -= 2;
|
|
for (o = 0; o < 3; o++) {
|
|
SiS_WriteDAC(SiS_Pr, DACData, sf, n,
|
|
table[di], table[si],
|
|
table[bx]);
|
|
si--;
|
|
}
|
|
}
|
|
si += 5;
|
|
}
|
|
}
|
|
}
|
|
|
|
/*********************************************/
|
|
/* SET CRT1 REGISTER GROUP */
|
|
/*********************************************/
|
|
|
|
static void
|
|
SiS_SetCRT1Group(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
|
|
unsigned short ModeIdIndex)
|
|
{
|
|
unsigned short StandTableIndex, rrti;
|
|
|
|
SiS_Pr->SiS_CRT1Mode = ModeNo;
|
|
|
|
if (ModeNo <= 0x13)
|
|
StandTableIndex = 0;
|
|
else
|
|
StandTableIndex = 1;
|
|
|
|
SiS_ResetSegmentRegisters(SiS_Pr);
|
|
SiS_SetSeqRegs(SiS_Pr, StandTableIndex);
|
|
SiS_SetMiscRegs(SiS_Pr, StandTableIndex);
|
|
SiS_SetCRTCRegs(SiS_Pr, StandTableIndex);
|
|
SiS_SetATTRegs(SiS_Pr, StandTableIndex);
|
|
SiS_SetGRCRegs(SiS_Pr, StandTableIndex);
|
|
SiS_ClearExt1Regs(SiS_Pr, ModeNo);
|
|
|
|
rrti = SiS_GetRatePtr(SiS_Pr, ModeNo, ModeIdIndex);
|
|
|
|
if (rrti != 0xFFFF) {
|
|
SiS_SetCRT1Sync(SiS_Pr, rrti);
|
|
SiS_SetCRT1CRTC(SiS_Pr, ModeNo, ModeIdIndex, rrti);
|
|
SiS_SetCRT1Offset(SiS_Pr, ModeNo, ModeIdIndex, rrti);
|
|
SiS_SetCRT1VCLK(SiS_Pr, ModeNo, rrti);
|
|
}
|
|
|
|
SiS_SetCRT1FIFO_310(SiS_Pr, ModeNo, ModeIdIndex);
|
|
|
|
SiS_SetCRT1ModeRegs(SiS_Pr, ModeNo, ModeIdIndex, rrti);
|
|
|
|
SiS_LoadDAC(SiS_Pr, ModeNo, ModeIdIndex);
|
|
|
|
SiS_DisplayOn(SiS_Pr);
|
|
}
|
|
|
|
/*********************************************/
|
|
/* SiSSetMode() */
|
|
/*********************************************/
|
|
|
|
int SiSUSBSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo)
|
|
{
|
|
unsigned short ModeIdIndex;
|
|
unsigned long BaseAddr = SiS_Pr->IOAddress;
|
|
|
|
SiSUSB_InitPtr(SiS_Pr);
|
|
SiSUSBRegInit(SiS_Pr, BaseAddr);
|
|
SiS_GetSysFlags(SiS_Pr);
|
|
|
|
if (!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex)))
|
|
return 0;
|
|
|
|
SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, 0x05, 0x86);
|
|
|
|
SiSInitPCIetc(SiS_Pr);
|
|
|
|
ModeNo &= 0x7f;
|
|
|
|
SiS_Pr->SiS_ModeType =
|
|
SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag & ModeTypeMask;
|
|
|
|
SiS_Pr->SiS_SetFlag = LowModeTests;
|
|
|
|
/* Set mode on CRT1 */
|
|
SiS_SetCRT1Group(SiS_Pr, ModeNo, ModeIdIndex);
|
|
|
|
SiS_HandleCRT1(SiS_Pr);
|
|
|
|
SiS_DisplayOn(SiS_Pr);
|
|
SiS_SetRegByte(SiS_Pr, SiS_Pr->SiS_P3c6, 0xFF);
|
|
|
|
/* Store mode number */
|
|
SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3d4, 0x34, ModeNo);
|
|
|
|
return 1;
|
|
}
|
|
|
|
int SiSUSBSetVESAMode(struct SiS_Private *SiS_Pr, unsigned short VModeNo)
|
|
{
|
|
unsigned short ModeNo = 0;
|
|
int i;
|
|
|
|
SiSUSB_InitPtr(SiS_Pr);
|
|
|
|
if (VModeNo == 0x03) {
|
|
|
|
ModeNo = 0x03;
|
|
|
|
} else {
|
|
|
|
i = 0;
|
|
do {
|
|
|
|
if (SiS_Pr->SiS_EModeIDTable[i].Ext_VESAID == VModeNo) {
|
|
ModeNo = SiS_Pr->SiS_EModeIDTable[i].Ext_ModeID;
|
|
break;
|
|
}
|
|
|
|
} while (SiS_Pr->SiS_EModeIDTable[i++].Ext_ModeID != 0xff);
|
|
|
|
}
|
|
|
|
if (!ModeNo)
|
|
return 0;
|
|
|
|
return SiSUSBSetMode(SiS_Pr, ModeNo);
|
|
}
|
|
|
|
#endif /* INCL_SISUSB_CON */
|