mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-27 06:34:11 +08:00
cc16d664e2
Add hwspinlock support for the CSR atlas7 SoC. The Hardware Spinlock device on atlas7 provides hardware assistance for synchronization between the multiple processors in the system (dual Cortex-A7, CAN bus Cortex-M3 and audio DSP). Reviewed-by: Suman Anna <s-anna@ti.com> Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Wei Chen <wei.chen@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
57 lines
1.4 KiB
Plaintext
57 lines
1.4 KiB
Plaintext
#
|
|
# Generic HWSPINLOCK framework
|
|
#
|
|
|
|
# HWSPINLOCK always gets selected by whoever wants it.
|
|
config HWSPINLOCK
|
|
tristate
|
|
|
|
menu "Hardware Spinlock drivers"
|
|
|
|
config HWSPINLOCK_OMAP
|
|
tristate "OMAP Hardware Spinlock device"
|
|
depends on ARCH_OMAP4 || SOC_OMAP5 || SOC_DRA7XX || SOC_AM33XX || SOC_AM43XX
|
|
select HWSPINLOCK
|
|
help
|
|
Say y here to support the OMAP Hardware Spinlock device (firstly
|
|
introduced in OMAP4).
|
|
|
|
If unsure, say N.
|
|
|
|
config HWSPINLOCK_QCOM
|
|
tristate "Qualcomm Hardware Spinlock device"
|
|
depends on ARCH_QCOM
|
|
select HWSPINLOCK
|
|
select MFD_SYSCON
|
|
help
|
|
Say y here to support the Qualcomm Hardware Mutex functionality, which
|
|
provides a synchronisation mechanism for the various processors on
|
|
the SoC.
|
|
|
|
If unsure, say N.
|
|
|
|
config HWSPINLOCK_SIRF
|
|
tristate "SIRF Hardware Spinlock device"
|
|
depends on ARCH_SIRF
|
|
select HWSPINLOCK
|
|
help
|
|
Say y here to support the SIRF Hardware Spinlock device, which
|
|
provides a synchronisation mechanism for the various processors
|
|
on the SoC.
|
|
|
|
It's safe to say n here if you're not interested in SIRF hardware
|
|
spinlock or just want a bare minimum kernel.
|
|
|
|
config HSEM_U8500
|
|
tristate "STE Hardware Semaphore functionality"
|
|
depends on ARCH_U8500
|
|
select HWSPINLOCK
|
|
help
|
|
Say y here to support the STE Hardware Semaphore functionality, which
|
|
provides a synchronisation mechanism for the various processor on the
|
|
SoC.
|
|
|
|
If unsure, say N.
|
|
|
|
endmenu
|