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6a438309a5
Add initial support for boards based on the Imagination Pistachio SoC. Pistachio is based on a dual-core MIPS interAptiv CPU and will boot using device-tree. Signed-off-by: James Hartley <james.hartley@imgtec.com> Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: Ezequiel Garcia <ezequiel.garcia@imgtec.com> Cc: James Hogan <james.hogan@imgtec.com> Patchwork: https://patchwork.linux-mips.org/patch/9569/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
29 lines
653 B
C
29 lines
653 B
C
/*
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* Pistachio IRQ setup
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*
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* Copyright (C) 2014 Google, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/irqchip.h>
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#include <linux/irqchip/mips-gic.h>
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#include <linux/kernel.h>
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#include <asm/cpu-features.h>
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#include <asm/irq_cpu.h>
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void __init arch_init_irq(void)
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{
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pr_info("EIC is %s\n", cpu_has_veic ? "on" : "off");
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pr_info("VINT is %s\n", cpu_has_vint ? "on" : "off");
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if (!cpu_has_veic)
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mips_cpu_irq_init();
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irqchip_init();
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}
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