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d2912cb15b
Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
114 lines
2.7 KiB
ArmAsm
114 lines
2.7 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-only */
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/* linux/drivers/spi/spi_s3c24xx_fiq.S
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*
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* Copyright 2009 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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*
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* S3C24XX SPI - FIQ pseudo-DMA transfer code
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*/
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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#include <mach/map.h>
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#include <mach/regs-irq.h>
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#include <plat/regs-spi.h>
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#include "spi-s3c24xx-fiq.h"
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.text
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@ entry to these routines is as follows, with the register names
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@ defined in fiq.h so that they can be shared with the C files which
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@ setup the calling registers.
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@
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@ fiq_rirq The base of the IRQ registers to find S3C2410_SRCPND
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@ fiq_rtmp Temporary register to hold tx/rx data
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@ fiq_rspi The base of the SPI register block
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@ fiq_rtx The tx buffer pointer
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@ fiq_rrx The rx buffer pointer
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@ fiq_rcount The number of bytes to move
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@ each entry starts with a word entry of how long it is
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@ and an offset to the irq acknowledgment word
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ENTRY(s3c24xx_spi_fiq_rx)
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s3c24xx_spi_fix_rx:
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.word fiq_rx_end - fiq_rx_start
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.word fiq_rx_irq_ack - fiq_rx_start
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fiq_rx_start:
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ldr fiq_rtmp, fiq_rx_irq_ack
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str fiq_rtmp, [ fiq_rirq, # S3C2410_SRCPND - S3C24XX_VA_IRQ ]
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ldrb fiq_rtmp, [ fiq_rspi, # S3C2410_SPRDAT ]
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strb fiq_rtmp, [ fiq_rrx ], #1
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mov fiq_rtmp, #0xff
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strb fiq_rtmp, [ fiq_rspi, # S3C2410_SPTDAT ]
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subs fiq_rcount, fiq_rcount, #1
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subnes pc, lr, #4 @@ return, still have work to do
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@@ set IRQ controller so that next op will trigger IRQ
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mov fiq_rtmp, #0
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str fiq_rtmp, [ fiq_rirq, # S3C2410_INTMOD - S3C24XX_VA_IRQ ]
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subs pc, lr, #4
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fiq_rx_irq_ack:
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.word 0
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fiq_rx_end:
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ENTRY(s3c24xx_spi_fiq_txrx)
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s3c24xx_spi_fiq_txrx:
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.word fiq_txrx_end - fiq_txrx_start
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.word fiq_txrx_irq_ack - fiq_txrx_start
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fiq_txrx_start:
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ldrb fiq_rtmp, [ fiq_rspi, # S3C2410_SPRDAT ]
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strb fiq_rtmp, [ fiq_rrx ], #1
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ldr fiq_rtmp, fiq_txrx_irq_ack
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str fiq_rtmp, [ fiq_rirq, # S3C2410_SRCPND - S3C24XX_VA_IRQ ]
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ldrb fiq_rtmp, [ fiq_rtx ], #1
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strb fiq_rtmp, [ fiq_rspi, # S3C2410_SPTDAT ]
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subs fiq_rcount, fiq_rcount, #1
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subnes pc, lr, #4 @@ return, still have work to do
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mov fiq_rtmp, #0
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str fiq_rtmp, [ fiq_rirq, # S3C2410_INTMOD - S3C24XX_VA_IRQ ]
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subs pc, lr, #4
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fiq_txrx_irq_ack:
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.word 0
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fiq_txrx_end:
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ENTRY(s3c24xx_spi_fiq_tx)
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s3c24xx_spi_fix_tx:
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.word fiq_tx_end - fiq_tx_start
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.word fiq_tx_irq_ack - fiq_tx_start
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fiq_tx_start:
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ldrb fiq_rtmp, [ fiq_rspi, # S3C2410_SPRDAT ]
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ldr fiq_rtmp, fiq_tx_irq_ack
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str fiq_rtmp, [ fiq_rirq, # S3C2410_SRCPND - S3C24XX_VA_IRQ ]
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ldrb fiq_rtmp, [ fiq_rtx ], #1
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strb fiq_rtmp, [ fiq_rspi, # S3C2410_SPTDAT ]
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subs fiq_rcount, fiq_rcount, #1
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subnes pc, lr, #4 @@ return, still have work to do
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mov fiq_rtmp, #0
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str fiq_rtmp, [ fiq_rirq, # S3C2410_INTMOD - S3C24XX_VA_IRQ ]
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subs pc, lr, #4
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fiq_tx_irq_ack:
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.word 0
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fiq_tx_end:
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.end
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