Claudiu Beznea 8dc4af8bef clk: at91: clk-sam9x60-pll: allow runtime changes for pll ... Allow runtime frequency changes for PLLs registered with proper flags. This is necessary for CPU PLL on SAMA7G5 which is used by DVFS. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/1605800597-16720-7-git-send-email-claudiu.beznea@microchip.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>		2020-12-19 11:50:55 -08:00
..
at91rm9200.c	clk: at91: clk-programmable: add mux_table option	2020-07-24 02:19:08 -07:00
at91sam9g45.c	clk: at91: drop unused at91sam9g45_pcr_layout	2020-09-22 12:44:35 -07:00
at91sam9n12.c	clk: at91: clk-programmable: add mux_table option	2020-07-24 02:19:08 -07:00
at91sam9rl.c	clk: at91: clk-programmable: add mux_table option	2020-07-24 02:19:08 -07:00
at91sam9x5.c	clk: at91: clk-programmable: add mux_table option	2020-07-24 02:19:08 -07:00
at91sam9260.c	clk: at91: clk-programmable: add mux_table option	2020-07-24 02:19:08 -07:00
clk-audio-pll.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152	2019-05-30 11:26:32 -07:00
clk-generated.c	clk: at91: clk-generated: add mux_table option	2020-07-24 02:19:08 -07:00
clk-h32mx.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152	2019-05-30 11:26:32 -07:00
clk-i2s-mux.c	clk: at91: move DT compatibility code to its own file	2018-10-17 10:45:39 -07:00
clk-main.c	clk: at91: clk-main: update key before writing AT91_CKGR_MOR	2020-10-13 19:59:01 -07:00
clk-master.c	clk: at91: clk-master: add 5th divisor for mck master	2020-12-19 11:50:55 -08:00
clk-peripheral.c	clk: at91: remove the checking of parent_name	2020-10-13 19:59:01 -07:00
clk-pll.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152	2019-05-30 11:26:32 -07:00
clk-plldiv.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152	2019-05-30 11:26:32 -07:00
clk-programmable.c	clk: at91: clk-programmable: add mux_table option	2020-07-24 02:19:08 -07:00
clk-sam9x60-pll.c	clk: at91: clk-sam9x60-pll: allow runtime changes for pll	2020-12-19 11:50:55 -08:00
clk-slow.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152	2019-05-30 11:26:32 -07:00
clk-smd.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152	2019-05-30 11:26:32 -07:00
clk-system.c	clk: at91: replace conditional operator with double logical not	2020-07-24 02:19:08 -07:00
clk-usb.c	clk: at91: usb: introduce num_parents in driver's structure	2020-02-12 15:31:47 -08:00
clk-utmi.c	clk: at91: clk-utmi: add utmi support for sama7g5	2020-07-24 02:19:08 -07:00
dt-compat.c	clk: at91: clk-programmable: add mux_table option	2020-07-24 02:19:08 -07:00
Makefile	clk: at91: sama7g5: add clock support for sama7g5	2020-07-24 02:19:09 -07:00
pmc.c	clk: at91: allow setting PCKx parent via DT	2020-05-26 20:22:43 -07:00
pmc.h	clk: at91: clk-sam9x60-pll: allow runtime changes for pll	2020-12-19 11:50:55 -08:00
sam9x60.c	clk: at91: clk-sam9x60-pll: allow runtime changes for pll	2020-12-19 11:50:55 -08:00
sama5d2.c	clk: at91: clk-programmable: add mux_table option	2020-07-24 02:19:08 -07:00
sama5d3.c	clk: at91: clk-programmable: add mux_table option	2020-07-24 02:19:08 -07:00
sama5d4.c	clk: at91: clk-programmable: add mux_table option	2020-07-24 02:19:08 -07:00
sama7g5.c	clk: at91: clk-sam9x60-pll: allow runtime changes for pll	2020-12-19 11:50:55 -08:00
sckc.c	clk: at91: sckc: register slow_rc with accuracy option	2020-07-24 02:19:08 -07:00