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df9e26d093
Add support for RTC of Exynos3250 SoC. The Exynos3250 needs source clock(32.768KHz) for RTC block. If source clock of RTC is registerd on clock list of common clk framework, Exynos RTC drvier have to control this clock. Clock list for s3c-rtc device: - rtc : CLK_RTC of CLK_GATE_IP_PERIR is gate clock for RTC. - rtc_src : XrtcXTI is 32.768.kHz source clock for RTC. (XRTCXTI: Specifies a clock from 32.768 kHz crystal pad with XRTCXTI and XRTCXTO pins. RTC uses this clock as the source of a real-time clock.) Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: Alessandro Zummo <a.zummo@towertech.it> Cc: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
24 lines
970 B
Plaintext
24 lines
970 B
Plaintext
* Samsung's S3C Real Time Clock controller
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Required properties:
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- compatible: should be one of the following.
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* "samsung,s3c2410-rtc" - for controllers compatible with s3c2410 rtc.
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* "samsung,s3c2416-rtc" - for controllers compatible with s3c2416 rtc.
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* "samsung,s3c2443-rtc" - for controllers compatible with s3c2443 rtc.
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* "samsung,s3c6410-rtc" - for controllers compatible with s3c6410 rtc.
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* "samsung,exynos3250-rtc" - for controllers compatible with exynos3250 rtc.
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- reg: physical base address of the controller and length of memory mapped
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region.
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- interrupts: Two interrupt numbers to the cpu should be specified. First
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interrupt number is the rtc alarm interrupt and second interrupt number
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is the rtc tick interrupt. The number of cells representing a interrupt
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depends on the parent interrupt controller.
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Example:
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rtc@10070000 {
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compatible = "samsung,s3c6410-rtc";
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reg = <0x10070000 0x100>;
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interrupts = <44 0 45 0>;
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};
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