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https://github.com/edk2-porting/linux-next.git
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f5e706ad88
With this commit all sparc64 header files are moved to asm-sparc.
The remaining files (71 files) were too different to be trivially
merged so divide them up in a _32.h and a _64.h file which
are both included from the file with no bit size.
The following script were used:
cd include
FILES=`wc -l asm-sparc64/*h | grep -v '^ 1' | cut -b 20-`
for FILE in ${FILES}; do
echo $FILE:
BASE=`echo $FILE | cut -d '.' -f 1`
FN32=${BASE}_32.h
FN64=${BASE}_64.h
GUARD=___ASM_SPARC_`echo $BASE | tr '-' '_' | tr [:lower:] [:upper:]`_H
git mv asm-sparc/$FILE asm-sparc/$FN32
git mv asm-sparc64/$FILE asm-sparc/$FN64
echo git mv done
printf "#ifndef %s\n" $GUARD > asm-sparc/$FILE
printf "#define %s\n" $GUARD >> asm-sparc/$FILE
printf "#if defined(__sparc__) && defined(__arch64__)\n" >> asm-sparc/$FILE
printf "#include <asm-sparc/%s>\n" $FN64 >> asm-sparc/$FILE
printf "#else\n" >> asm-sparc/$FILE
printf "#include <asm-sparc/%s>\n" $FN32 >> asm-sparc/$FILE
printf "#endif\n" >> asm-sparc/$FILE
printf "#endif\n" >> asm-sparc/$FILE
git add asm-sparc/$FILE
echo new file done
printf "#include <asm-sparc/%s>\n" $FILE > asm-sparc64/$FILE
git add asm-sparc64/$FILE
echo sparc64 file done
done
The guard contains three '_' to avoid conflict with existing guards.
In additing the two Kbuild files are emptied to avoid breaking
headers_* targets.
We will reintroduce the exported header files when the necessary
kbuild changes are merged.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
156 lines
4.4 KiB
C
156 lines
4.4 KiB
C
#ifndef __SPARC64_MMU_CONTEXT_H
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#define __SPARC64_MMU_CONTEXT_H
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/* Derived heavily from Linus's Alpha/AXP ASN code... */
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#ifndef __ASSEMBLY__
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#include <linux/spinlock.h>
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#include <asm/system.h>
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#include <asm/spitfire.h>
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#include <asm-generic/mm_hooks.h>
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static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
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{
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}
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extern spinlock_t ctx_alloc_lock;
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extern unsigned long tlb_context_cache;
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extern unsigned long mmu_context_bmap[];
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extern void get_new_mmu_context(struct mm_struct *mm);
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#ifdef CONFIG_SMP
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extern void smp_new_mmu_context_version(void);
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#else
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#define smp_new_mmu_context_version() do { } while (0)
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#endif
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extern int init_new_context(struct task_struct *tsk, struct mm_struct *mm);
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extern void destroy_context(struct mm_struct *mm);
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extern void __tsb_context_switch(unsigned long pgd_pa,
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struct tsb_config *tsb_base,
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struct tsb_config *tsb_huge,
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unsigned long tsb_descr_pa);
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static inline void tsb_context_switch(struct mm_struct *mm)
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{
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__tsb_context_switch(__pa(mm->pgd),
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&mm->context.tsb_block[0],
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#ifdef CONFIG_HUGETLB_PAGE
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(mm->context.tsb_block[1].tsb ?
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&mm->context.tsb_block[1] :
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NULL)
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#else
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NULL
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#endif
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, __pa(&mm->context.tsb_descr[0]));
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}
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extern void tsb_grow(struct mm_struct *mm, unsigned long tsb_index, unsigned long mm_rss);
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#ifdef CONFIG_SMP
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extern void smp_tsb_sync(struct mm_struct *mm);
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#else
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#define smp_tsb_sync(__mm) do { } while (0)
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#endif
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/* Set MMU context in the actual hardware. */
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#define load_secondary_context(__mm) \
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__asm__ __volatile__( \
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"\n661: stxa %0, [%1] %2\n" \
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" .section .sun4v_1insn_patch, \"ax\"\n" \
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" .word 661b\n" \
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" stxa %0, [%1] %3\n" \
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" .previous\n" \
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" flush %%g6\n" \
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: /* No outputs */ \
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: "r" (CTX_HWBITS((__mm)->context)), \
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"r" (SECONDARY_CONTEXT), "i" (ASI_DMMU), "i" (ASI_MMU))
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extern void __flush_tlb_mm(unsigned long, unsigned long);
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/* Switch the current MM context. Interrupts are disabled. */
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static inline void switch_mm(struct mm_struct *old_mm, struct mm_struct *mm, struct task_struct *tsk)
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{
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unsigned long ctx_valid, flags;
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int cpu;
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if (unlikely(mm == &init_mm))
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return;
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spin_lock_irqsave(&mm->context.lock, flags);
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ctx_valid = CTX_VALID(mm->context);
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if (!ctx_valid)
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get_new_mmu_context(mm);
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/* We have to be extremely careful here or else we will miss
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* a TSB grow if we switch back and forth between a kernel
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* thread and an address space which has it's TSB size increased
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* on another processor.
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*
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* It is possible to play some games in order to optimize the
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* switch, but the safest thing to do is to unconditionally
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* perform the secondary context load and the TSB context switch.
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*
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* For reference the bad case is, for address space "A":
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*
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* CPU 0 CPU 1
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* run address space A
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* set cpu0's bits in cpu_vm_mask
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* switch to kernel thread, borrow
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* address space A via entry_lazy_tlb
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* run address space A
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* set cpu1's bit in cpu_vm_mask
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* flush_tlb_pending()
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* reset cpu_vm_mask to just cpu1
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* TSB grow
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* run address space A
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* context was valid, so skip
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* TSB context switch
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*
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* At that point cpu0 continues to use a stale TSB, the one from
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* before the TSB grow performed on cpu1. cpu1 did not cross-call
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* cpu0 to update it's TSB because at that point the cpu_vm_mask
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* only had cpu1 set in it.
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*/
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load_secondary_context(mm);
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tsb_context_switch(mm);
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/* Any time a processor runs a context on an address space
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* for the first time, we must flush that context out of the
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* local TLB.
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*/
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cpu = smp_processor_id();
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if (!ctx_valid || !cpu_isset(cpu, mm->cpu_vm_mask)) {
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cpu_set(cpu, mm->cpu_vm_mask);
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__flush_tlb_mm(CTX_HWBITS(mm->context),
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SECONDARY_CONTEXT);
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}
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spin_unlock_irqrestore(&mm->context.lock, flags);
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}
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#define deactivate_mm(tsk,mm) do { } while (0)
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/* Activate a new MM instance for the current task. */
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static inline void activate_mm(struct mm_struct *active_mm, struct mm_struct *mm)
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{
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unsigned long flags;
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int cpu;
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spin_lock_irqsave(&mm->context.lock, flags);
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if (!CTX_VALID(mm->context))
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get_new_mmu_context(mm);
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cpu = smp_processor_id();
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if (!cpu_isset(cpu, mm->cpu_vm_mask))
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cpu_set(cpu, mm->cpu_vm_mask);
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load_secondary_context(mm);
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__flush_tlb_mm(CTX_HWBITS(mm->context), SECONDARY_CONTEXT);
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tsb_context_switch(mm);
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spin_unlock_irqrestore(&mm->context.lock, flags);
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}
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#endif /* !(__ASSEMBLY__) */
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#endif /* !(__SPARC64_MMU_CONTEXT_H) */
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