mirror of
https://github.com/edk2-porting/linux-next.git
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8b45bc892e
These are changes for drivers that are intimately tied to some SoC
and for some reason could not get merged through the respective
subsystem maintainer tree.
Most of the new code is for the Keystone Navigator driver, which is
new base support that is going to be needed for their hardware
accelerated network driver and other units.
Most of the commits are for moving old code around from at91 and omap
for things that are done in device drivers nowadays.
- at91: move reset, poweroff, memory and clocksource code into drivers
directories
- socfpga: add edac driver (through arm-soc, as requested by Boris)
- omap: move omap-intc code to drivers/irqchip
- sunxi: added an RTC driver for sun6i
- omap: mailbox driver related changes
- keystone: support for the "Navigator" component
- versatile: new reboot, led and soc drivers
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIVAwUAVDWWQGCrR//JCVInAQKX7Q//bDkoseKCZsGaXN7vfQ2YhT3SAc52mROV
YQKdNmtMUrHqDgngATZTx5ogOh1hInnqueFjGGhfMYsHQO1Vj8+odj0r+4jhjuUY
3YfY+qZ+91tq33JlUOhKn+mfVMdxJc8XarGgR6MSWYkqWVYCtLtBluum7hKm2UJ6
/e4hd2zzImX5ATwj/LXWLx5eTf1qAVFGWzNUph1DrW+1V5lOu58X4gKwk1QOCVEh
Pa0GV9oRTkjoswwz9drzjeFtie2yofQ2mygj6QKxg5NsosIF0+B8kJ61Sxwg56Ak
tF+qn1hGtB2cDQkpxK4o2cZgCELhkh5Aqgol/vZUS1DMBSUEGCV9PPp2eOW83r3B
0zsTgsShyVcTh7khdpQmHNRigvcc7e69LaAGC4o/RxaZpCU/LUNCQ+/iqVExSE8A
VNEXr+JNxGxhj3m9KUHuEktdWx1oNvaYR8Rr4RPr6EWR8R6emJ04I7kXInvzhJZL
HOGh75vSuAU83FrsP8fFRLadoHNVDXylAs38BPfGEMngVpjvwJLgQ3+729CwW+Q4
+xQXAKSwKfr8xA8eg6wBSbFcwnEW4QwRqFqQ5XPw7zTZkCZbiLtvn3JpI5bH5A5Q
/d2D+M2vFbB7VbWJBM4etO95eNS/pfhqJhcQh4t0DjXjoW6WqLiHCxhEx8Ogfvop
/4ckyGvtEOI=
=POJD
-----END PGP SIGNATURE-----
Merge tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Arnd Bergmann:
"These are changes for drivers that are intimately tied to some SoC and
for some reason could not get merged through the respective subsystem
maintainer tree.
Most of the new code is for the Keystone Navigator driver, which is
new base support that is going to be needed for their hardware
accelerated network driver and other units.
Most of the commits are for moving old code around from at91 and omap
for things that are done in device drivers nowadays.
- at91: move reset, poweroff, memory and clocksource code into
drivers directories
- socfpga: add edac driver (through arm-soc, as requested by Boris)
- omap: move omap-intc code to drivers/irqchip
- sunxi: added an RTC driver for sun6i
- omap: mailbox driver related changes
- keystone: support for the "Navigator" component
- versatile: new reboot, led and soc drivers"
* tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (92 commits)
bus: arm-ccn: Fix spurious warning message
leds: add device tree bindings for register bit LEDs
soc: add driver for the ARM RealView
power: reset: driver for the Versatile syscon reboot
leds: add a driver for syscon-based LEDs
drivers/soc: ti: fix build break with modules
MAINTAINERS: Add Keystone Multicore Navigator drivers entry
soc: ti: add Keystone Navigator DMA support
Documentation: dt: soc: add Keystone Navigator DMA bindings
soc: ti: add Keystone Navigator QMSS driver
Documentation: dt: soc: add Keystone Navigator QMSS bindings
rtc: sunxi: Depend on platforms sun4i/sun7i that actually have the rtc
rtc: sun6i: Add sun6i RTC driver
irqchip: omap-intc: remove unnecessary comments
irqchip: omap-intc: correct maximum number or MIR registers
irqchip: omap-intc: enable TURBO idle mode
irqchip: omap-intc: enable IP protection
irqchip: omap-intc: remove unnecesary of_address_to_resource() call
irqchip: omap-intc: comment style cleanup
irqchip: omap-intc: minor improvement to omap_irq_pending()
...
848 lines
19 KiB
Plaintext
848 lines
19 KiB
Plaintext
/*
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* Device Tree Source for AM33XX SoC
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*
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* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pinctrl/am33xx.h>
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#include "skeleton.dtsi"
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/ {
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compatible = "ti,am33xx";
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interrupt-parent = <&intc>;
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aliases {
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i2c0 = &i2c0;
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i2c1 = &i2c1;
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i2c2 = &i2c2;
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serial0 = &uart0;
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serial1 = &uart1;
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serial2 = &uart2;
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serial3 = &uart3;
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serial4 = &uart4;
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serial5 = &uart5;
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d_can0 = &dcan0;
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d_can1 = &dcan1;
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usb0 = &usb0;
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usb1 = &usb1;
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phy0 = &usb0_phy;
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phy1 = &usb1_phy;
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ethernet0 = &cpsw_emac0;
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ethernet1 = &cpsw_emac1;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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compatible = "arm,cortex-a8";
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device_type = "cpu";
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reg = <0>;
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/*
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* To consider voltage drop between PMIC and SoC,
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* tolerance value is reduced to 2% from 4% and
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* voltage value is increased as a precaution.
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*/
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operating-points = <
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/* kHz uV */
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720000 1285000
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600000 1225000
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500000 1125000
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275000 1125000
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>;
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voltage-tolerance = <2>; /* 2 percentage */
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clocks = <&dpll_mpu_ck>;
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clock-names = "cpu";
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clock-latency = <300000>; /* From omap-cpufreq driver */
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};
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};
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pmu {
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compatible = "arm,cortex-a8-pmu";
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interrupts = <3>;
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};
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/*
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* The soc node represents the soc top level view. It is used for IPs
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* that are not memory mapped in the MPU view or for the MPU itself.
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*/
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soc {
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compatible = "ti,omap-infra";
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mpu {
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compatible = "ti,omap3-mpu";
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ti,hwmods = "mpu";
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};
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};
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am33xx_pinmux: pinmux@44e10800 {
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compatible = "pinctrl-single";
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reg = <0x44e10800 0x0238>;
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-single,register-width = <32>;
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pinctrl-single,function-mask = <0x7f>;
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};
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/*
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* XXX: Use a flat representation of the AM33XX interconnect.
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* The real AM33XX interconnect network is quite complex. Since
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* it will not bring real advantage to represent that in DT
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* for the moment, just use a fake OCP bus entry to represent
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* the whole bus hierarchy.
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*/
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ocp {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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ti,hwmods = "l3_main";
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prcm: prcm@44e00000 {
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compatible = "ti,am3-prcm";
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reg = <0x44e00000 0x4000>;
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prcm_clocks: clocks {
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#address-cells = <1>;
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#size-cells = <0>;
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};
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prcm_clockdomains: clockdomains {
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};
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};
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scrm: scrm@44e10000 {
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compatible = "ti,am3-scrm";
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reg = <0x44e10000 0x2000>;
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scrm_clocks: clocks {
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#address-cells = <1>;
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#size-cells = <0>;
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};
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scrm_clockdomains: clockdomains {
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};
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};
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intc: interrupt-controller@48200000 {
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compatible = "ti,am33xx-intc";
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0x48200000 0x1000>;
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};
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edma: edma@49000000 {
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compatible = "ti,edma3";
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ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
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reg = <0x49000000 0x10000>,
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<0x44e10f90 0x40>;
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interrupts = <12 13 14>;
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#dma-cells = <1>;
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};
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gpio0: gpio@44e07000 {
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compatible = "ti,omap4-gpio";
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ti,hwmods = "gpio1";
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0x44e07000 0x1000>;
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interrupts = <96>;
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};
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gpio1: gpio@4804c000 {
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compatible = "ti,omap4-gpio";
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ti,hwmods = "gpio2";
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0x4804c000 0x1000>;
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interrupts = <98>;
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};
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gpio2: gpio@481ac000 {
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compatible = "ti,omap4-gpio";
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ti,hwmods = "gpio3";
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0x481ac000 0x1000>;
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interrupts = <32>;
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};
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gpio3: gpio@481ae000 {
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compatible = "ti,omap4-gpio";
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ti,hwmods = "gpio4";
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0x481ae000 0x1000>;
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interrupts = <62>;
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};
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uart0: serial@44e09000 {
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compatible = "ti,omap3-uart";
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ti,hwmods = "uart1";
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clock-frequency = <48000000>;
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reg = <0x44e09000 0x2000>;
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interrupts = <72>;
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status = "disabled";
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};
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uart1: serial@48022000 {
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compatible = "ti,omap3-uart";
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ti,hwmods = "uart2";
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clock-frequency = <48000000>;
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reg = <0x48022000 0x2000>;
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interrupts = <73>;
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status = "disabled";
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};
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uart2: serial@48024000 {
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compatible = "ti,omap3-uart";
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ti,hwmods = "uart3";
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clock-frequency = <48000000>;
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reg = <0x48024000 0x2000>;
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interrupts = <74>;
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status = "disabled";
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};
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uart3: serial@481a6000 {
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compatible = "ti,omap3-uart";
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ti,hwmods = "uart4";
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clock-frequency = <48000000>;
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reg = <0x481a6000 0x2000>;
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interrupts = <44>;
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status = "disabled";
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};
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uart4: serial@481a8000 {
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compatible = "ti,omap3-uart";
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ti,hwmods = "uart5";
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clock-frequency = <48000000>;
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reg = <0x481a8000 0x2000>;
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interrupts = <45>;
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status = "disabled";
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};
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uart5: serial@481aa000 {
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compatible = "ti,omap3-uart";
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ti,hwmods = "uart6";
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clock-frequency = <48000000>;
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reg = <0x481aa000 0x2000>;
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interrupts = <46>;
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status = "disabled";
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};
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i2c0: i2c@44e0b000 {
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compatible = "ti,omap4-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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ti,hwmods = "i2c1";
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reg = <0x44e0b000 0x1000>;
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interrupts = <70>;
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status = "disabled";
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};
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i2c1: i2c@4802a000 {
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compatible = "ti,omap4-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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ti,hwmods = "i2c2";
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reg = <0x4802a000 0x1000>;
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interrupts = <71>;
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status = "disabled";
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};
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i2c2: i2c@4819c000 {
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compatible = "ti,omap4-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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ti,hwmods = "i2c3";
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reg = <0x4819c000 0x1000>;
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interrupts = <30>;
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status = "disabled";
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};
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mmc1: mmc@48060000 {
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compatible = "ti,omap4-hsmmc";
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ti,hwmods = "mmc1";
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ti,dual-volt;
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ti,needs-special-reset;
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ti,needs-special-hs-handling;
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dmas = <&edma 24
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&edma 25>;
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dma-names = "tx", "rx";
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interrupts = <64>;
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interrupt-parent = <&intc>;
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reg = <0x48060000 0x1000>;
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status = "disabled";
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};
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mmc2: mmc@481d8000 {
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compatible = "ti,omap4-hsmmc";
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ti,hwmods = "mmc2";
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ti,needs-special-reset;
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dmas = <&edma 2
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&edma 3>;
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dma-names = "tx", "rx";
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interrupts = <28>;
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interrupt-parent = <&intc>;
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reg = <0x481d8000 0x1000>;
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status = "disabled";
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};
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mmc3: mmc@47810000 {
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compatible = "ti,omap4-hsmmc";
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ti,hwmods = "mmc3";
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ti,needs-special-reset;
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interrupts = <29>;
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interrupt-parent = <&intc>;
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reg = <0x47810000 0x1000>;
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status = "disabled";
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};
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hwspinlock: spinlock@480ca000 {
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compatible = "ti,omap4-hwspinlock";
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reg = <0x480ca000 0x1000>;
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ti,hwmods = "spinlock";
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#hwlock-cells = <1>;
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};
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wdt2: wdt@44e35000 {
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compatible = "ti,omap3-wdt";
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ti,hwmods = "wd_timer2";
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reg = <0x44e35000 0x1000>;
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interrupts = <91>;
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};
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dcan0: d_can@481cc000 {
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compatible = "bosch,d_can";
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ti,hwmods = "d_can0";
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reg = <0x481cc000 0x2000
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0x44e10644 0x4>;
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interrupts = <52>;
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status = "disabled";
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};
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dcan1: d_can@481d0000 {
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compatible = "bosch,d_can";
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ti,hwmods = "d_can1";
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reg = <0x481d0000 0x2000
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0x44e10644 0x4>;
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interrupts = <55>;
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status = "disabled";
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};
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mailbox: mailbox@480C8000 {
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compatible = "ti,omap4-mailbox";
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reg = <0x480C8000 0x200>;
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interrupts = <77>;
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ti,hwmods = "mailbox";
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ti,mbox-num-users = <4>;
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ti,mbox-num-fifos = <8>;
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mbox_wkupm3: wkup_m3 {
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ti,mbox-tx = <0 0 0>;
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ti,mbox-rx = <0 0 3>;
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};
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};
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timer1: timer@44e31000 {
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compatible = "ti,am335x-timer-1ms";
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reg = <0x44e31000 0x400>;
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interrupts = <67>;
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ti,hwmods = "timer1";
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ti,timer-alwon;
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};
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timer2: timer@48040000 {
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compatible = "ti,am335x-timer";
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reg = <0x48040000 0x400>;
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interrupts = <68>;
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ti,hwmods = "timer2";
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};
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timer3: timer@48042000 {
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compatible = "ti,am335x-timer";
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reg = <0x48042000 0x400>;
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interrupts = <69>;
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ti,hwmods = "timer3";
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};
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timer4: timer@48044000 {
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compatible = "ti,am335x-timer";
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reg = <0x48044000 0x400>;
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interrupts = <92>;
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ti,hwmods = "timer4";
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ti,timer-pwm;
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};
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timer5: timer@48046000 {
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compatible = "ti,am335x-timer";
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reg = <0x48046000 0x400>;
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interrupts = <93>;
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ti,hwmods = "timer5";
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ti,timer-pwm;
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};
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timer6: timer@48048000 {
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compatible = "ti,am335x-timer";
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reg = <0x48048000 0x400>;
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interrupts = <94>;
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ti,hwmods = "timer6";
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ti,timer-pwm;
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};
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timer7: timer@4804a000 {
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compatible = "ti,am335x-timer";
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reg = <0x4804a000 0x400>;
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interrupts = <95>;
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ti,hwmods = "timer7";
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ti,timer-pwm;
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};
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rtc: rtc@44e3e000 {
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compatible = "ti,da830-rtc";
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reg = <0x44e3e000 0x1000>;
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interrupts = <75
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76>;
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ti,hwmods = "rtc";
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};
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spi0: spi@48030000 {
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compatible = "ti,omap4-mcspi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x48030000 0x400>;
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interrupts = <65>;
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ti,spi-num-cs = <2>;
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ti,hwmods = "spi0";
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dmas = <&edma 16
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&edma 17
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&edma 18
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&edma 19>;
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dma-names = "tx0", "rx0", "tx1", "rx1";
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status = "disabled";
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};
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spi1: spi@481a0000 {
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compatible = "ti,omap4-mcspi";
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#address-cells = <1>;
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|
#size-cells = <0>;
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reg = <0x481a0000 0x400>;
|
|
interrupts = <125>;
|
|
ti,spi-num-cs = <2>;
|
|
ti,hwmods = "spi1";
|
|
dmas = <&edma 42
|
|
&edma 43
|
|
&edma 44
|
|
&edma 45>;
|
|
dma-names = "tx0", "rx0", "tx1", "rx1";
|
|
status = "disabled";
|
|
};
|
|
|
|
usb: usb@47400000 {
|
|
compatible = "ti,am33xx-usb";
|
|
reg = <0x47400000 0x1000>;
|
|
ranges;
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
ti,hwmods = "usb_otg_hs";
|
|
status = "disabled";
|
|
|
|
usb_ctrl_mod: control@44e10620 {
|
|
compatible = "ti,am335x-usb-ctrl-module";
|
|
reg = <0x44e10620 0x10
|
|
0x44e10648 0x4>;
|
|
reg-names = "phy_ctrl", "wakeup";
|
|
status = "disabled";
|
|
};
|
|
|
|
usb0_phy: usb-phy@47401300 {
|
|
compatible = "ti,am335x-usb-phy";
|
|
reg = <0x47401300 0x100>;
|
|
reg-names = "phy";
|
|
status = "disabled";
|
|
ti,ctrl_mod = <&usb_ctrl_mod>;
|
|
};
|
|
|
|
usb0: usb@47401000 {
|
|
compatible = "ti,musb-am33xx";
|
|
status = "disabled";
|
|
reg = <0x47401400 0x400
|
|
0x47401000 0x200>;
|
|
reg-names = "mc", "control";
|
|
|
|
interrupts = <18>;
|
|
interrupt-names = "mc";
|
|
dr_mode = "otg";
|
|
mentor,multipoint = <1>;
|
|
mentor,num-eps = <16>;
|
|
mentor,ram-bits = <12>;
|
|
mentor,power = <500>;
|
|
phys = <&usb0_phy>;
|
|
|
|
dmas = <&cppi41dma 0 0 &cppi41dma 1 0
|
|
&cppi41dma 2 0 &cppi41dma 3 0
|
|
&cppi41dma 4 0 &cppi41dma 5 0
|
|
&cppi41dma 6 0 &cppi41dma 7 0
|
|
&cppi41dma 8 0 &cppi41dma 9 0
|
|
&cppi41dma 10 0 &cppi41dma 11 0
|
|
&cppi41dma 12 0 &cppi41dma 13 0
|
|
&cppi41dma 14 0 &cppi41dma 0 1
|
|
&cppi41dma 1 1 &cppi41dma 2 1
|
|
&cppi41dma 3 1 &cppi41dma 4 1
|
|
&cppi41dma 5 1 &cppi41dma 6 1
|
|
&cppi41dma 7 1 &cppi41dma 8 1
|
|
&cppi41dma 9 1 &cppi41dma 10 1
|
|
&cppi41dma 11 1 &cppi41dma 12 1
|
|
&cppi41dma 13 1 &cppi41dma 14 1>;
|
|
dma-names =
|
|
"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
|
|
"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
|
|
"rx14", "rx15",
|
|
"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
|
|
"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
|
|
"tx14", "tx15";
|
|
};
|
|
|
|
usb1_phy: usb-phy@47401b00 {
|
|
compatible = "ti,am335x-usb-phy";
|
|
reg = <0x47401b00 0x100>;
|
|
reg-names = "phy";
|
|
status = "disabled";
|
|
ti,ctrl_mod = <&usb_ctrl_mod>;
|
|
};
|
|
|
|
usb1: usb@47401800 {
|
|
compatible = "ti,musb-am33xx";
|
|
status = "disabled";
|
|
reg = <0x47401c00 0x400
|
|
0x47401800 0x200>;
|
|
reg-names = "mc", "control";
|
|
interrupts = <19>;
|
|
interrupt-names = "mc";
|
|
dr_mode = "otg";
|
|
mentor,multipoint = <1>;
|
|
mentor,num-eps = <16>;
|
|
mentor,ram-bits = <12>;
|
|
mentor,power = <500>;
|
|
phys = <&usb1_phy>;
|
|
|
|
dmas = <&cppi41dma 15 0 &cppi41dma 16 0
|
|
&cppi41dma 17 0 &cppi41dma 18 0
|
|
&cppi41dma 19 0 &cppi41dma 20 0
|
|
&cppi41dma 21 0 &cppi41dma 22 0
|
|
&cppi41dma 23 0 &cppi41dma 24 0
|
|
&cppi41dma 25 0 &cppi41dma 26 0
|
|
&cppi41dma 27 0 &cppi41dma 28 0
|
|
&cppi41dma 29 0 &cppi41dma 15 1
|
|
&cppi41dma 16 1 &cppi41dma 17 1
|
|
&cppi41dma 18 1 &cppi41dma 19 1
|
|
&cppi41dma 20 1 &cppi41dma 21 1
|
|
&cppi41dma 22 1 &cppi41dma 23 1
|
|
&cppi41dma 24 1 &cppi41dma 25 1
|
|
&cppi41dma 26 1 &cppi41dma 27 1
|
|
&cppi41dma 28 1 &cppi41dma 29 1>;
|
|
dma-names =
|
|
"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
|
|
"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
|
|
"rx14", "rx15",
|
|
"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
|
|
"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
|
|
"tx14", "tx15";
|
|
};
|
|
|
|
cppi41dma: dma-controller@47402000 {
|
|
compatible = "ti,am3359-cppi41";
|
|
reg = <0x47400000 0x1000
|
|
0x47402000 0x1000
|
|
0x47403000 0x1000
|
|
0x47404000 0x4000>;
|
|
reg-names = "glue", "controller", "scheduler", "queuemgr";
|
|
interrupts = <17>;
|
|
interrupt-names = "glue";
|
|
#dma-cells = <2>;
|
|
#dma-channels = <30>;
|
|
#dma-requests = <256>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
epwmss0: epwmss@48300000 {
|
|
compatible = "ti,am33xx-pwmss";
|
|
reg = <0x48300000 0x10>;
|
|
ti,hwmods = "epwmss0";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
status = "disabled";
|
|
ranges = <0x48300100 0x48300100 0x80 /* ECAP */
|
|
0x48300180 0x48300180 0x80 /* EQEP */
|
|
0x48300200 0x48300200 0x80>; /* EHRPWM */
|
|
|
|
ecap0: ecap@48300100 {
|
|
compatible = "ti,am33xx-ecap";
|
|
#pwm-cells = <3>;
|
|
reg = <0x48300100 0x80>;
|
|
interrupts = <31>;
|
|
interrupt-names = "ecap0";
|
|
ti,hwmods = "ecap0";
|
|
status = "disabled";
|
|
};
|
|
|
|
ehrpwm0: ehrpwm@48300200 {
|
|
compatible = "ti,am33xx-ehrpwm";
|
|
#pwm-cells = <3>;
|
|
reg = <0x48300200 0x80>;
|
|
ti,hwmods = "ehrpwm0";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
epwmss1: epwmss@48302000 {
|
|
compatible = "ti,am33xx-pwmss";
|
|
reg = <0x48302000 0x10>;
|
|
ti,hwmods = "epwmss1";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
status = "disabled";
|
|
ranges = <0x48302100 0x48302100 0x80 /* ECAP */
|
|
0x48302180 0x48302180 0x80 /* EQEP */
|
|
0x48302200 0x48302200 0x80>; /* EHRPWM */
|
|
|
|
ecap1: ecap@48302100 {
|
|
compatible = "ti,am33xx-ecap";
|
|
#pwm-cells = <3>;
|
|
reg = <0x48302100 0x80>;
|
|
interrupts = <47>;
|
|
interrupt-names = "ecap1";
|
|
ti,hwmods = "ecap1";
|
|
status = "disabled";
|
|
};
|
|
|
|
ehrpwm1: ehrpwm@48302200 {
|
|
compatible = "ti,am33xx-ehrpwm";
|
|
#pwm-cells = <3>;
|
|
reg = <0x48302200 0x80>;
|
|
ti,hwmods = "ehrpwm1";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
epwmss2: epwmss@48304000 {
|
|
compatible = "ti,am33xx-pwmss";
|
|
reg = <0x48304000 0x10>;
|
|
ti,hwmods = "epwmss2";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
status = "disabled";
|
|
ranges = <0x48304100 0x48304100 0x80 /* ECAP */
|
|
0x48304180 0x48304180 0x80 /* EQEP */
|
|
0x48304200 0x48304200 0x80>; /* EHRPWM */
|
|
|
|
ecap2: ecap@48304100 {
|
|
compatible = "ti,am33xx-ecap";
|
|
#pwm-cells = <3>;
|
|
reg = <0x48304100 0x80>;
|
|
interrupts = <61>;
|
|
interrupt-names = "ecap2";
|
|
ti,hwmods = "ecap2";
|
|
status = "disabled";
|
|
};
|
|
|
|
ehrpwm2: ehrpwm@48304200 {
|
|
compatible = "ti,am33xx-ehrpwm";
|
|
#pwm-cells = <3>;
|
|
reg = <0x48304200 0x80>;
|
|
ti,hwmods = "ehrpwm2";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
mac: ethernet@4a100000 {
|
|
compatible = "ti,cpsw";
|
|
ti,hwmods = "cpgmac0";
|
|
clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
|
|
clock-names = "fck", "cpts";
|
|
cpdma_channels = <8>;
|
|
ale_entries = <1024>;
|
|
bd_ram_size = <0x2000>;
|
|
no_bd_ram = <0>;
|
|
rx_descs = <64>;
|
|
mac_control = <0x20>;
|
|
slaves = <2>;
|
|
active_slave = <0>;
|
|
cpts_clock_mult = <0x80000000>;
|
|
cpts_clock_shift = <29>;
|
|
reg = <0x4a100000 0x800
|
|
0x4a101200 0x100>;
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
interrupt-parent = <&intc>;
|
|
/*
|
|
* c0_rx_thresh_pend
|
|
* c0_rx_pend
|
|
* c0_tx_pend
|
|
* c0_misc_pend
|
|
*/
|
|
interrupts = <40 41 42 43>;
|
|
ranges;
|
|
status = "disabled";
|
|
|
|
davinci_mdio: mdio@4a101000 {
|
|
compatible = "ti,davinci_mdio";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
ti,hwmods = "davinci_mdio";
|
|
bus_freq = <1000000>;
|
|
reg = <0x4a101000 0x100>;
|
|
status = "disabled";
|
|
};
|
|
|
|
cpsw_emac0: slave@4a100200 {
|
|
/* Filled in by U-Boot */
|
|
mac-address = [ 00 00 00 00 00 00 ];
|
|
};
|
|
|
|
cpsw_emac1: slave@4a100300 {
|
|
/* Filled in by U-Boot */
|
|
mac-address = [ 00 00 00 00 00 00 ];
|
|
};
|
|
|
|
phy_sel: cpsw-phy-sel@44e10650 {
|
|
compatible = "ti,am3352-cpsw-phy-sel";
|
|
reg= <0x44e10650 0x4>;
|
|
reg-names = "gmii-sel";
|
|
};
|
|
};
|
|
|
|
ocmcram: ocmcram@40300000 {
|
|
compatible = "mmio-sram";
|
|
reg = <0x40300000 0x10000>; /* 64k */
|
|
};
|
|
|
|
wkup_m3: wkup_m3@44d00000 {
|
|
compatible = "ti,am3353-wkup-m3";
|
|
reg = <0x44d00000 0x4000 /* M3 UMEM */
|
|
0x44d80000 0x2000>; /* M3 DMEM */
|
|
ti,hwmods = "wkup_m3";
|
|
ti,no-reset-on-init;
|
|
};
|
|
|
|
elm: elm@48080000 {
|
|
compatible = "ti,am3352-elm";
|
|
reg = <0x48080000 0x2000>;
|
|
interrupts = <4>;
|
|
ti,hwmods = "elm";
|
|
status = "disabled";
|
|
};
|
|
|
|
lcdc: lcdc@4830e000 {
|
|
compatible = "ti,am33xx-tilcdc";
|
|
reg = <0x4830e000 0x1000>;
|
|
interrupt-parent = <&intc>;
|
|
interrupts = <36>;
|
|
ti,hwmods = "lcdc";
|
|
status = "disabled";
|
|
};
|
|
|
|
tscadc: tscadc@44e0d000 {
|
|
compatible = "ti,am3359-tscadc";
|
|
reg = <0x44e0d000 0x1000>;
|
|
interrupt-parent = <&intc>;
|
|
interrupts = <16>;
|
|
ti,hwmods = "adc_tsc";
|
|
status = "disabled";
|
|
|
|
tsc {
|
|
compatible = "ti,am3359-tsc";
|
|
};
|
|
am335x_adc: adc {
|
|
#io-channel-cells = <1>;
|
|
compatible = "ti,am3359-adc";
|
|
};
|
|
};
|
|
|
|
gpmc: gpmc@50000000 {
|
|
compatible = "ti,am3352-gpmc";
|
|
ti,hwmods = "gpmc";
|
|
ti,no-idle-on-init;
|
|
reg = <0x50000000 0x2000>;
|
|
interrupts = <100>;
|
|
gpmc,num-cs = <7>;
|
|
gpmc,num-waitpins = <2>;
|
|
#address-cells = <2>;
|
|
#size-cells = <1>;
|
|
status = "disabled";
|
|
};
|
|
|
|
sham: sham@53100000 {
|
|
compatible = "ti,omap4-sham";
|
|
ti,hwmods = "sham";
|
|
reg = <0x53100000 0x200>;
|
|
interrupts = <109>;
|
|
dmas = <&edma 36>;
|
|
dma-names = "rx";
|
|
};
|
|
|
|
aes: aes@53500000 {
|
|
compatible = "ti,omap4-aes";
|
|
ti,hwmods = "aes";
|
|
reg = <0x53500000 0xa0>;
|
|
interrupts = <103>;
|
|
dmas = <&edma 6>,
|
|
<&edma 5>;
|
|
dma-names = "tx", "rx";
|
|
};
|
|
|
|
mcasp0: mcasp@48038000 {
|
|
compatible = "ti,am33xx-mcasp-audio";
|
|
ti,hwmods = "mcasp0";
|
|
reg = <0x48038000 0x2000>,
|
|
<0x46000000 0x400000>;
|
|
reg-names = "mpu", "dat";
|
|
interrupts = <80>, <81>;
|
|
interrupt-names = "tx", "rx";
|
|
status = "disabled";
|
|
dmas = <&edma 8>,
|
|
<&edma 9>;
|
|
dma-names = "tx", "rx";
|
|
};
|
|
|
|
mcasp1: mcasp@4803C000 {
|
|
compatible = "ti,am33xx-mcasp-audio";
|
|
ti,hwmods = "mcasp1";
|
|
reg = <0x4803C000 0x2000>,
|
|
<0x46400000 0x400000>;
|
|
reg-names = "mpu", "dat";
|
|
interrupts = <82>, <83>;
|
|
interrupt-names = "tx", "rx";
|
|
status = "disabled";
|
|
dmas = <&edma 10>,
|
|
<&edma 11>;
|
|
dma-names = "tx", "rx";
|
|
};
|
|
|
|
rng: rng@48310000 {
|
|
compatible = "ti,omap4-rng";
|
|
ti,hwmods = "rng";
|
|
reg = <0x48310000 0x2000>;
|
|
interrupts = <111>;
|
|
};
|
|
};
|
|
};
|
|
|
|
/include/ "am33xx-clocks.dtsi"
|