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https://github.com/edk2-porting/linux-next.git
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d74595278f
Replaced existing multiple queue functionality with framework that allows for the creation of pairs of request and response queues, either at start of day or dynamically. Queue pair creation depend on module parameter "ql2xmqsupport", which need to be enabled to create queue pair. Signed-off-by: Sawan Chandak <sawan.chandak@cavium.com> Signed-off-by: Michael Hernandez <michael.hernandez@cavium.com> Signed-off-by: Himanshu Madhani <himanshu.madhani@cavium.com> Acked-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
322 lines
7.1 KiB
C
322 lines
7.1 KiB
C
/*
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* QLogic Fibre Channel HBA Driver
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* Copyright (c) 2003-2014 QLogic Corporation
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*
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* See LICENSE.qla2xxx for copyright and licensing details.
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*/
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#include "qla_target.h"
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/**
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* qla24xx_calc_iocbs() - Determine number of Command Type 3 and
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* Continuation Type 1 IOCBs to allocate.
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*
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* @dsds: number of data segment decriptors needed
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*
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* Returns the number of IOCB entries needed to store @dsds.
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*/
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static inline uint16_t
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qla24xx_calc_iocbs(scsi_qla_host_t *vha, uint16_t dsds)
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{
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uint16_t iocbs;
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iocbs = 1;
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if (dsds > 1) {
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iocbs += (dsds - 1) / 5;
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if ((dsds - 1) % 5)
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iocbs++;
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}
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return iocbs;
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}
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/*
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* qla2x00_debounce_register
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* Debounce register.
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*
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* Input:
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* port = register address.
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*
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* Returns:
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* register value.
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*/
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static __inline__ uint16_t
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qla2x00_debounce_register(volatile uint16_t __iomem *addr)
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{
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volatile uint16_t first;
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volatile uint16_t second;
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do {
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first = RD_REG_WORD(addr);
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barrier();
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cpu_relax();
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second = RD_REG_WORD(addr);
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} while (first != second);
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return (first);
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}
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static inline void
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qla2x00_poll(struct rsp_que *rsp)
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{
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unsigned long flags;
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struct qla_hw_data *ha = rsp->hw;
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local_irq_save(flags);
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if (IS_P3P_TYPE(ha))
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qla82xx_poll(0, rsp);
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else
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ha->isp_ops->intr_handler(0, rsp);
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local_irq_restore(flags);
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}
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static inline uint8_t *
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host_to_fcp_swap(uint8_t *fcp, uint32_t bsize)
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{
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uint32_t *ifcp = (uint32_t *) fcp;
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uint32_t *ofcp = (uint32_t *) fcp;
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uint32_t iter = bsize >> 2;
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for (; iter ; iter--)
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*ofcp++ = swab32(*ifcp++);
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return fcp;
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}
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static inline void
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host_to_adap(uint8_t *src, uint8_t *dst, uint32_t bsize)
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{
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uint32_t *isrc = (uint32_t *) src;
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__le32 *odest = (__le32 *) dst;
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uint32_t iter = bsize >> 2;
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for ( ; iter--; isrc++)
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*odest++ = cpu_to_le32(*isrc);
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}
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static inline void
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qla2x00_set_reserved_loop_ids(struct qla_hw_data *ha)
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{
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int i;
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if (IS_FWI2_CAPABLE(ha))
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return;
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for (i = 0; i < SNS_FIRST_LOOP_ID; i++)
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set_bit(i, ha->loop_id_map);
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set_bit(MANAGEMENT_SERVER, ha->loop_id_map);
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set_bit(BROADCAST, ha->loop_id_map);
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}
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static inline int
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qla2x00_is_reserved_id(scsi_qla_host_t *vha, uint16_t loop_id)
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{
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struct qla_hw_data *ha = vha->hw;
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if (IS_FWI2_CAPABLE(ha))
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return (loop_id > NPH_LAST_HANDLE);
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return ((loop_id > ha->max_loop_id && loop_id < SNS_FIRST_LOOP_ID) ||
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loop_id == MANAGEMENT_SERVER || loop_id == BROADCAST);
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}
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static inline void
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qla2x00_clear_loop_id(fc_port_t *fcport) {
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struct qla_hw_data *ha = fcport->vha->hw;
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if (fcport->loop_id == FC_NO_LOOP_ID ||
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qla2x00_is_reserved_id(fcport->vha, fcport->loop_id))
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return;
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clear_bit(fcport->loop_id, ha->loop_id_map);
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fcport->loop_id = FC_NO_LOOP_ID;
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}
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static inline void
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qla2x00_clean_dsd_pool(struct qla_hw_data *ha, srb_t *sp,
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struct qla_tgt_cmd *tc)
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{
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struct dsd_dma *dsd_ptr, *tdsd_ptr;
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struct crc_context *ctx;
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if (sp)
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ctx = (struct crc_context *)GET_CMD_CTX_SP(sp);
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else if (tc)
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ctx = (struct crc_context *)tc->ctx;
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else {
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BUG();
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return;
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}
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/* clean up allocated prev pool */
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list_for_each_entry_safe(dsd_ptr, tdsd_ptr,
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&ctx->dsd_list, list) {
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dma_pool_free(ha->dl_dma_pool, dsd_ptr->dsd_addr,
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dsd_ptr->dsd_list_dma);
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list_del(&dsd_ptr->list);
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kfree(dsd_ptr);
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}
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INIT_LIST_HEAD(&ctx->dsd_list);
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}
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static inline void
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qla2x00_set_fcport_state(fc_port_t *fcport, int state)
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{
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int old_state;
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old_state = atomic_read(&fcport->state);
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atomic_set(&fcport->state, state);
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/* Don't print state transitions during initial allocation of fcport */
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if (old_state && old_state != state) {
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ql_dbg(ql_dbg_disc, fcport->vha, 0x207d,
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"FCPort state transitioned from %s to %s - "
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"portid=%02x%02x%02x.\n",
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port_state_str[old_state], port_state_str[state],
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fcport->d_id.b.domain, fcport->d_id.b.area,
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fcport->d_id.b.al_pa);
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}
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}
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static inline int
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qla2x00_hba_err_chk_enabled(srb_t *sp)
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{
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/*
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* Uncomment when corresponding SCSI changes are done.
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*
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if (!sp->cmd->prot_chk)
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return 0;
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*
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*/
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switch (scsi_get_prot_op(GET_CMD_SP(sp))) {
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case SCSI_PROT_READ_STRIP:
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case SCSI_PROT_WRITE_INSERT:
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if (ql2xenablehba_err_chk >= 1)
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return 1;
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break;
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case SCSI_PROT_READ_PASS:
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case SCSI_PROT_WRITE_PASS:
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if (ql2xenablehba_err_chk >= 2)
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return 1;
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break;
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case SCSI_PROT_READ_INSERT:
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case SCSI_PROT_WRITE_STRIP:
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return 1;
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}
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return 0;
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}
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static inline int
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qla2x00_reset_active(scsi_qla_host_t *vha)
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{
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scsi_qla_host_t *base_vha = pci_get_drvdata(vha->hw->pdev);
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/* Test appropriate base-vha and vha flags. */
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return test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) ||
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test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
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test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
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test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
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test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
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}
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static inline srb_t *
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qla2xxx_get_qpair_sp(struct qla_qpair *qpair, fc_port_t *fcport, gfp_t flag)
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{
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srb_t *sp = NULL;
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uint8_t bail;
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QLA_QPAIR_MARK_BUSY(qpair, bail);
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if (unlikely(bail))
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return NULL;
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sp = mempool_alloc(qpair->srb_mempool, flag);
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if (!sp)
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goto done;
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memset(sp, 0, sizeof(*sp));
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sp->fcport = fcport;
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sp->iocbs = 1;
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done:
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if (!sp)
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QLA_QPAIR_MARK_NOT_BUSY(qpair);
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return sp;
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}
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static inline void
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qla2xxx_rel_qpair_sp(struct qla_qpair *qpair, srb_t *sp)
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{
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mempool_free(sp, qpair->srb_mempool);
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QLA_QPAIR_MARK_NOT_BUSY(qpair);
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}
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static inline srb_t *
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qla2x00_get_sp(scsi_qla_host_t *vha, fc_port_t *fcport, gfp_t flag)
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{
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srb_t *sp = NULL;
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struct qla_hw_data *ha = vha->hw;
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uint8_t bail;
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QLA_VHA_MARK_BUSY(vha, bail);
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if (unlikely(bail))
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return NULL;
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sp = mempool_alloc(ha->srb_mempool, flag);
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if (!sp)
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goto done;
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memset(sp, 0, sizeof(*sp));
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sp->fcport = fcport;
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sp->iocbs = 1;
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done:
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if (!sp)
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QLA_VHA_MARK_NOT_BUSY(vha);
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return sp;
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}
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static inline void
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qla2x00_rel_sp(scsi_qla_host_t *vha, srb_t *sp)
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{
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mempool_free(sp, vha->hw->srb_mempool);
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QLA_VHA_MARK_NOT_BUSY(vha);
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}
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static inline void
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qla2x00_init_timer(srb_t *sp, unsigned long tmo)
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{
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init_timer(&sp->u.iocb_cmd.timer);
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sp->u.iocb_cmd.timer.expires = jiffies + tmo * HZ;
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sp->u.iocb_cmd.timer.data = (unsigned long)sp;
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sp->u.iocb_cmd.timer.function = qla2x00_sp_timeout;
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add_timer(&sp->u.iocb_cmd.timer);
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sp->free = qla2x00_sp_free;
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if ((IS_QLAFX00(sp->fcport->vha->hw)) &&
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(sp->type == SRB_FXIOCB_DCMD))
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init_completion(&sp->u.iocb_cmd.u.fxiocb.fxiocb_comp);
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if (sp->type == SRB_ELS_DCMD)
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init_completion(&sp->u.iocb_cmd.u.els_logo.comp);
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}
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static inline int
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qla2x00_gid_list_size(struct qla_hw_data *ha)
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{
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if (IS_QLAFX00(ha))
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return sizeof(uint32_t) * 32;
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else
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return sizeof(struct gid_list_info) * ha->max_fibre_devices;
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}
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static inline void
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qla2x00_handle_mbx_completion(struct qla_hw_data *ha, int status)
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{
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if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) &&
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(status & MBX_INTERRUPT) && ha->flags.mbox_int) {
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set_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
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clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
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complete(&ha->mbx_intr_comp);
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}
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}
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static inline void
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qla2x00_set_retry_delay_timestamp(fc_port_t *fcport, uint16_t retry_delay)
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{
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if (retry_delay)
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fcport->retry_delay_timestamp = jiffies +
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(retry_delay * HZ / 10);
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}
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